
Design and Test Technology for Dependable Systems-on-Chip
Raimund Ubar(Editor)
IGI Global (Publisher)
Published on 31. March 2011
Book
Hardback
350 pages
978-1-60960-212-3 (ISBN)
Description
Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear application can have serious consequences. Design and Test Technology for Dependable Systems-on-Chip covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). This book provides insight into refined "classical" design and test topics and solutions for IC test technology and fault-tolerant systems.
More details
Series
Language
English
Place of publication
Hershey
United States
Target group
Professional and scholarly
Dimensions
Height: 286 mm
Width: 221 mm
Thickness: 35 mm
Weight
1699 gr
ISBN-13
978-1-60960-212-3 (9781609602123)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Content
Built-In Self Repair for Logic Structures Combined Test-Data Compression and Test Planning Diagnostic Modeling of Digital Systems Fault Simulation and Fault Injection Technology Fault-Tolerant and Fail-Safe Design Based on Reconfiguration Flexible Fault-Tolerant Schedules for Embedded Systems Memory Testing and Self-Repair Optimizing Fault Tolerance for Multi-Processor System-on-Chip Software-Based Self-Test of Embedded Microprocessors Transient Faults Detection and Compensation