
The Verilog® Hardware Description Language
Springer (Publisher)
5th Edition
Published on 15. February 2014
Book
Paperback/Softback
XXII, 382 pages
978-1-4757-7589-1 (ISBN)
Description
xv From the Old to the New xvii Acknowledgments xxi 1 Verilog - A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("
More details
Edition
5th ed. 2002. Softcover reprint of the original 5th ed. 2002
Language
English
Place of publication
New York
United States
Target group
Primary & secondary/elementary & high school
Graduate
Edition type
Revised edition
Illustrations
XXII, 382 p. With online files/update.
Dimensions
Height: 235 mm
Width: 155 mm
Thickness: 23 mm
Weight
616 gr
ISBN-13
978-1-4757-7589-1 (9781475775891)
DOI
10.1007/b116662
Schweitzer Classification
Other editions
Additional editions

Donald E. Thomas | Philip R. Moorby
The Verilog® Hardware Description Language
Book
06/2002
5th Edition
Kluwer Academic Publishers
€128.39
Shipment within 15-20 days
Content
Verilog - A Tutorial Introduction.- Logic Synthesis.- Behavioral Modeling.- Concurrent Processes.- Module Hierarchy.- Logic Level Modeling.- Cycle-Accurate Specification.- Advanced Timing.- User-Defined Primitives.- Switch Level Modeling.- Projects.