
The Verilog® Hardware Description Language
Springer (Publisher)
5th Edition
Published on 8. October 2008
Book
Paperback/Softback
XXII, 386 pages
978-0-387-84930-0 (ISBN)
Description
XV From the Old to the New xvii Acknowledgments xx| Verilog A Tutorial Introduction Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 Behavioral Modeling of Combinational Circuits 11 Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 Procedural Modeling of Clocked Sequential Circuits 14 Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("
More details
Edition
5th ed. 2002
Language
English
Place of publication
New York
United States
Target group
Primary & secondary/elementary & high school
Graduate
Edition type
Revised edition
Product notice
Paperback (trade)
Unsewn / adhesive bound
Illustrations
XXII, 386 p. With online files/update.
Dimensions
Height: 231 mm
Width: 152 mm
Thickness: 23 mm
Weight
567 gr
ISBN-13
978-0-387-84930-0 (9780387849300)
DOI
10.1007/978-0-387-85344-4
Schweitzer Classification
Other editions
Additional editions

Donald Thomas | Philip Moorby
The Verilog® Hardware Description Language
E-Book
09/2008
5th Edition
Springer
€80.24
Available for download
Content
Verilog - A Tutorial Introduction.- Logic Synthesis.- Behavioral Modeling.- Concurrent Processes.- Module Hierarchy.- Logic Level Modeling.- Cycle-Accurate Specification.- Advanced Timing.- User-Defined Primitives.- Switch Level Modeling.- Projects.