Monolithic Integrated Power Electronics for Submodular Photovoltaic Energy Harvesting
Published on 2. May 2016
Book
Hardback
228 pages
978-3-8439-2593-8 (ISBN)
Description
This work investigates the feasibility and advantages of submodular energy harvesting for urban and mobile photovoltaic (PV) applications. State-of-the-art solutions show substantial output energy losses due to mismatch of the applied series connected PV cells which is caused by inhomogeneous irradiance and manufacturing variations. By reducing the number of series connected PV cells to only 10, the impact of partial shading on output power is significantly reduced. Each of these submodules is attached to a boost converter. It keeps the connected PV cells in their maximum power points (MPPs) independent from the applied string current. Due to the low number of series connected cells, the application of medium voltage CMOS technology is enabled featuring low cost, high reliability and small size at the same time.
In order to maximize the output energy of the submodule concept, two optimized MPP trackers, have been developed in a hardware description language. Both utilize the high switching frequency of the boost converter for fast convergence and very high MPP accuracy which is proven by measurements.
An optimized ASIC prototype tailored to the submodule concept requirements has been developed. Measurements of the synchronous boost converter yield a closed loop switching frequency of 662 kHz and RMS current ripples below 0.5 %. In addition to the technical challenges, also the economic feasibility has been investigated in dependence on the levelized cost of electricity (LCOE). The submodule concept pays off in less than 10 years without any incentives even for LCOE as low as 0.038 $/kWh.
To improve performance of the integrated drivers in the ASIC prototype, a novel digital pulse-width modulation gate driver with closed loop gate-source voltage (VGS) control has been developed. It features low area requirements without any external components, low driving losses and accurate control of the driven MOSFET. Measurements prove the full functionality of the control loop and its ability to maintain the target VGS value during supply voltage or temperature variations. With the developed components and measurement results of this work the technical feasibility and economic benefits of the submodule concept are demonstrated.
In order to maximize the output energy of the submodule concept, two optimized MPP trackers, have been developed in a hardware description language. Both utilize the high switching frequency of the boost converter for fast convergence and very high MPP accuracy which is proven by measurements.
An optimized ASIC prototype tailored to the submodule concept requirements has been developed. Measurements of the synchronous boost converter yield a closed loop switching frequency of 662 kHz and RMS current ripples below 0.5 %. In addition to the technical challenges, also the economic feasibility has been investigated in dependence on the levelized cost of electricity (LCOE). The submodule concept pays off in less than 10 years without any incentives even for LCOE as low as 0.038 $/kWh.
To improve performance of the integrated drivers in the ASIC prototype, a novel digital pulse-width modulation gate driver with closed loop gate-source voltage (VGS) control has been developed. It features low area requirements without any external components, low driving losses and accurate control of the driven MOSFET. Measurements prove the full functionality of the control loop and its ability to maintain the target VGS value during supply voltage or temperature variations. With the developed components and measurement results of this work the technical feasibility and economic benefits of the submodule concept are demonstrated.