Cover: Introduction to Logic Synthesis using Verilog HDL - Springer

Introduction to Logic Synthesis using Verilog HDL

Springer (Publisher)
Published on 31. December 2007
Book
Paperback/Softback
VII, 75 pages
978-3-031-79742-2 (ISBN)
€29.95incl. 7% vat
Shipment within 15-20 days

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