
Data-parallel Digital Signal Processors
Algorithm mapping, architecture scaling and workload adaptation
Sridhar Rajagopal(Author)
LAP Lambert Academic Publishing
Published on 25. July 2011
Book
Paperback/Softback
196 pages
978-3-8443-1797-8 (ISBN)
Description
Emerging applications such as high definition television (HDTV), streaming video, image processing in embedded applications and signal processing in high-speed wireless communications are driving a need for high performance digital signal processors (DSPs) with real-time processing. This class of applications demonstrates significant data parallelism, finite precision,need for power-efficiency and the need for 100's of arithmetic units in the DSP to meet real-time requirements. Data-parallel DSPs meet these requirements by employing clusters of functional units, enabling 100's of computations every clock cycle. These DSPs exploit instruction level parallelism and subword parallelism within clusters, similar to atraditional VLIW (Very Long Instruction Word) DSP, and exploit data parallelism across clusters, similar to vector processors.
More details
Language
English
Place of publication
Germany
Product notice
Paperback (trade)
Unsewn / adhesive bound
Dimensions
Height: 220 mm
Width: 150 mm
Thickness: 13 mm
Weight
310 gr
ISBN-13
978-3-8443-1797-8 (9783844317978)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Person
Sridhar Rajagopal received his M.S. and Ph.D. degrees from Rice University, Houston, TX in 2000 and 2004 respectively. He is currently employed at Samsung Telecommunications America, in Richardson, TX as a research staff engineer. He can be reached at sridhar@alumni.rice.edu.