
Computer Organization and Design MIPS Edition
The Hardware/Software Interface
Morgan Kaufmann (Publisher)
5th Edition
Published on 10. October 2013
Book
Paperback/Softback
800 pages
978-0-12-407726-3 (ISBN)
Article exhausted; check for reprint
Description
Computer Organization and Design, Fifth Edition, is the latest update to the classic introduction to computer organization. The text now contains new examples and material highlighting the emergence of mobile computing and the cloud. It explores this generational change with updated content featuring tablet computers, cloud infrastructure, and the ARM (mobile computing devices) and x86 (cloud computing) architectures. The book uses a MIPS processor core to present the fundamentals of hardware technologies, assembly language, computer arithmetic, pipelining, memory hierarchies and I/O.Because an understanding of modern hardware is essential to achieving good performance and energy efficiency, this edition adds a new concrete example, Going Faster, used throughout the text to demonstrate extremely effective optimization techniques. There is also a new discussion of the Eight Great Ideas of computer architecture. Parallelism is examined in depth with examples and content highlighting parallel hardware and software topics. The book features the Intel Core i7, ARM Cortex-A8 and NVIDIA Fermi GPU as real-world examples, along with a full set of updated and improved exercises.This new edition is an ideal resource for professional digital system designers, programmers, application developers, and system software developers. It will also be of interest to undergraduate students in Computer Science, Computer Engineering and Electrical Engineering courses in Computer Organization, Computer Design, ranging from Sophomore required courses to Senior Electives.
Reviews / Votes
"...the fundamental computer organization book, both as an introduction for readers with no experience in computer architecture topics, and as an up-to-date reference for computer architects." --Computing Reviews, July 22 2014More details
Series
Edition
5th edition
Language
English
Place of publication
San Francisco
United States
Publishing group
Elsevier Science & Technology
Target group
College/higher education
Undergraduate students in computer science, computer engineering and electrical engineering courses in computer organization/architecture or computer design (ranging from sophomore required courses to senior elective). Professional digital system designers, programmers, application developers, and system software developers.
Dimensions
Height: 235 mm
Width: 191 mm
Weight
1220 gr
ISBN-13
978-0-12-407726-3 (9780124077263)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
New editions

David A. Patterson | John L. Hennessy
Computer Organization and Design MIPS Edition
The Hardware/Software Interface
Book
12/2020
6th Edition
Morgan Kaufmann
€98.00
Shipment within 10-15 days

David A. Patterson | John L. Hennessy
Computer Organization and Design MIPS Edition
The Hardware/Software Interface
Book
11/2020
6th Edition
Morgan Kaufmann
€96.50
The article will not be published
Additional editions

David A. Patterson | John L. Hennessy
Computer Organization and Design MIPS Edition
The Hardware/Software Interface
E-Book
09/2013
5th Edition
Morgan Kaufmann
€50.99
Available for download
Previous edition

John L. Hennessy | David A. Patterson
Computer Organization and Design
The Hardware/Software Interface
Book
12/2011
4th Edition
Morgan Kaufmann
€76.74
Article exhausted; check for reprint
Persons
ACM named David A. Patterson a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. David A. Patterson is the Pardee Chair of Computer Science, Emeritus at the University of California Berkeley. His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM, CRA, and SIGARCH. ACM named John L. Hennessy a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. John L. Hennessy is a Professor of Electrical Engineering and Computer Science at Stanford University, where he has been a member of the faculty since 1977 and was, from 2000 to 2016, its tenth President. Prof. Hennessy is a Fellow of the IEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the American Academy of Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates.
Author
Pardee Professor of Computer Science, Emeritus, University of California, Berkeley, USA
Departments of Electrical Engineering and Computer Science, Stanford University, USA
Content
1. Computer Abstractions and Technology2. Instructions: Language of the Computer3. Arithmetic for Computers4. The Processor5. Large and Fast: Exploiting Memory Hierarchy6. Parallel Processors from Client to Cloud
APP A Assemblers, Linkers, and the SPIM SimulatorAPP B The Basics of Logic DesignAPP C Graphics and Computing GPUsAPP D Mapping Control to Hardware; APP E A Survey of RISC Architectures for Desktop, Server, and Embedded Computers
APP A Assemblers, Linkers, and the SPIM SimulatorAPP B The Basics of Logic DesignAPP C Graphics and Computing GPUsAPP D Mapping Control to Hardware; APP E A Survey of RISC Architectures for Desktop, Server, and Embedded Computers