
Digital Signal Processing 101
Everything You Need to Know to Get Started
Michael Parker(Author)
Newnes (Publisher)
2nd Edition
Published on 26. June 2017
Book
Paperback/Softback
432 pages
978-0-12-811453-7 (ISBN)
Description
Digital Signal Processing 101: Everything You Need to Know to Get Started provides a basic tutorial on digital signal processing (DSP). Beginning with discussions of numerical representation and complex numbers and exponentials, it goes on to explain difficult concepts such as sampling, aliasing, imaginary numbers, and frequency response. It does so using easy-to-understand examples with minimum mathematics. In addition, there is an overview of the DSP functions and implementation used in several DSP-intensive fields or applications, from error correction to CDMA mobile communication to airborne radar systems.
This book has been updated to include the latest developments in Digital Signal Processing, and has eight new chapters on:
Automotive Radar Signal Processing
Space-Time Adaptive Processing Radar
Field Orientated Motor Control
Matrix Inversion algorithms
GPUs for computing
Machine Learning
Entropy and Predictive Coding
Video compression
This book has been updated to include the latest developments in Digital Signal Processing, and has eight new chapters on:
Automotive Radar Signal Processing
Space-Time Adaptive Processing Radar
Field Orientated Motor Control
Matrix Inversion algorithms
GPUs for computing
Machine Learning
Entropy and Predictive Coding
Video compression
More details
Edition
2nd edition
Language
English
Place of publication
Oxford
United Kingdom
Publishing group
Elsevier Science & Technology
Target group
Professional and scholarly
Electrical engineers, software engineers, hardware engineers, system engineers and students with no DSP experience.
Product notice
Paperback (trade)
Unsewn / adhesive bound
Dimensions
Height: 233 mm
Width: 189 mm
Thickness: 25 mm
Weight
906 gr
ISBN-13
978-0-12-811453-7 (9780128114537)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions

E-Book
06/2017
2nd Edition
Newnes
€59.95
Available for download
Previous edition

Book
05/2010
Newnes
€74.46
Shipment within 10-15 days
Person
Michael Parker is responsible for Intel's FPGA division digital signal processing (DSP) product planning. This includes Variable Precision FPGA silicon architecture for DSP applications, DSP tool development, floating point tools, IP and video IP. He joined Altera (now Intel) in January 2007, and has over 20 years of previous DSP engineering design experience with companies such as Alvarion, Soma Networks, Avalcom, TCSI, Stanford Telecom and several startup companies. He holds an MSEE from Santa Clara University, and BSEE from Rensselaer Polytechnic Institute.
Content
1. Numerical Representation2. Complex Numbers and Exponentials3. Sampling, Aliasing and Quantization4. Frequency Response5. Finite Impulse Response (FIR) Filters6. Windowing7. Decimation and Interpolation8. Infinite Impulse Response (IIR) Filters9. Matrix Inversion algorithms (QR and Cholesky Decomposition)10. Complex Modulation and Demodulation11. Discrete and Fast Fourier Transforms (DFT, FFT)12. Discrete Cosine Transform (DCT)13. Digital Up and Down Conversion14. Error Correction Coding15. Analog and TDMA Wireless Communications16. CDMA Wireless Communications17. OFDMA Wireless Communications18. Radar Basics19. Pulse Doppler Radar20. FMCW Radar Signal Processing21. Space-Time Adaptive Processing Radar (STAP)22. Synthetic Array Radar (SAR)23. Field Orientated Motor Control24. Introduction to Video Processing25. Introduction to Video Compression26. Introduction to Machine Learning27. Implementation using Digital Signal Processors28. Implementation using FPGAs
Appendix A - Q Format Shift with Fractional MultiplicationAppendix B - Evaluation of FIR Design Error MinimizationAppendix C - Laplace transformAppendix D - Z transformAppendix E - Binary Field Arithmetic
Appendix A - Q Format Shift with Fractional MultiplicationAppendix B - Evaluation of FIR Design Error MinimizationAppendix C - Laplace transformAppendix D - Z transformAppendix E - Binary Field Arithmetic