
Computer Arithmetic
Algorithms and Hardware Designs
Behrooz Parhami(Author)
Oxford University Press Inc
2nd Edition
Published on 1. October 2009
Book
Hardback
672 pages
978-0-19-532848-6 (ISBN)
Description
Ideal for graduate and senior undergraduate courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, provides a balanced, comprehensive treatment of computer arithmetic. It covers topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics-including techniques for high-throughput, low-power, fault-tolerant, and reconfigurable arithmetic. An appendix provides a historical view of the field and speculates on its future.
An indispensable resource for instruction, professional development, and research, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems. This second edition includes a new chapter on reconfigurable arithmetic, in order to address the fact that arithmetic functions are increasingly being implemented on field-programmable gate arrays (FPGAs) and FPGA-like configurable devices. Updated and thoroughly revised, the book offers new and expanded coverage of saturating adders and multipliers, truncated multipliers, fused multiply-add units, overlapped quotient digit selection, bipartite and multipartite tables, reversible logic, dot notation, modular arithmetic, Montgomery modular reduction, division by constants, IEEE floating-point standard formats, and interval arithmetic.
Features: * Divided into 28 lecture-size chapters * Emphasizes both the underlying theories of computer arithmetic and actual hardware designs * Carefully links computer arithmetic to other subfields of computer engineering * Includes 717 end-of-chapter problems ranging in complexity from simple exercises to mini-projects * Incorporates many examples of practical designs * Uses consistent standardized notation throughout * Instructor's manual includes solutions to text problems * An author-maintained website http://www.ece.ucsb.edu/~parhami/text comp arit.htm contains instructor resources, including complete lecture slides
An indispensable resource for instruction, professional development, and research, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems. This second edition includes a new chapter on reconfigurable arithmetic, in order to address the fact that arithmetic functions are increasingly being implemented on field-programmable gate arrays (FPGAs) and FPGA-like configurable devices. Updated and thoroughly revised, the book offers new and expanded coverage of saturating adders and multipliers, truncated multipliers, fused multiply-add units, overlapped quotient digit selection, bipartite and multipartite tables, reversible logic, dot notation, modular arithmetic, Montgomery modular reduction, division by constants, IEEE floating-point standard formats, and interval arithmetic.
Features: * Divided into 28 lecture-size chapters * Emphasizes both the underlying theories of computer arithmetic and actual hardware designs * Carefully links computer arithmetic to other subfields of computer engineering * Includes 717 end-of-chapter problems ranging in complexity from simple exercises to mini-projects * Incorporates many examples of practical designs * Uses consistent standardized notation throughout * Instructor's manual includes solutions to text problems * An author-maintained website http://www.ece.ucsb.edu/~parhami/text comp arit.htm contains instructor resources, including complete lecture slides
More details
Edition
2nd Revised edition
Language
English
Place of publication
New York
United States
Edition type
Revised edition
Illustrations
300 line illus.
Dimensions
Height: 241 mm
Width: 196 mm
Thickness: 40 mm
Weight
1403 gr
ISBN-13
978-0-19-532848-6 (9780195328486)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Previous edition
Book
09/1999
Oxford University Press Inc
€56.67
Article exhausted; check for reprint
Person
Author
, Professor, Electrical and Computer Engineering University of California, Santa Barbara
Content
Table of Contents Preface Part I: NUMBER REPRESENTATION 1. Numbers and Arithmetic 2. Representing Signed Numbers 3. Redundant Number Systems 4. Residue Number Systems Part II: ADDITION/SUBTRACTION 5. Basic Addition and Counting 6. Carry - Lookahead Adders 7. Variations in Fast Adders 8. Multioperand Addition Part III: MULTIPLICATION 9. Basic Multiplication Schemes 10. High - Radix Multipliers 11. Tree and Array Multipliers 12. Variations in Multipliers Part IV: DIVISION 13. Basic Division Schemes 14. High - Radix Dividers 15. Variations in Dividers 16. Division by Convergence PART V: REAL ARITHMETIC 17. Floating - Point Representations 18. Floating - Point Operations 19. Errors and Error Control 20. Precise and Certifiable Arithmetic PART VI: FUNCTION EVALUATION 21. Square - Rooting Methods 22. The CORDIC Algorithms 23. Variations in Function Evaluation 24. Arithmetic by Table Lookup
25. High - Throughput Arithmetic PART VII: IMPLEMENTATION TOPICS 26. Low - Power Arithmetic 27. Fault - Tolerant Arithmetic 28. Reconfigurable Arithmetic APPENDIX: PAST, PRESENT, AND FUTURE A.1 Historical Perspective A.2 Early High - Performance Machine A.3 Deeply Pipelined Vector Machines A.4 The DSP Revolution A.5 Supercomputers on Our Laps A.6 Trends Outlook and Resources
25. High - Throughput Arithmetic PART VII: IMPLEMENTATION TOPICS 26. Low - Power Arithmetic 27. Fault - Tolerant Arithmetic 28. Reconfigurable Arithmetic APPENDIX: PAST, PRESENT, AND FUTURE A.1 Historical Perspective A.2 Early High - Performance Machine A.3 Deeply Pipelined Vector Machines A.4 The DSP Revolution A.5 Supercomputers on Our Laps A.6 Trends Outlook and Resources