Embedded Computer Systems: Architectures, Modeling, and Simulation
22nd International Conference, SAMOS 2022, Samos, Greece, July 3-7, 2022, Proceedings
Published on 14. August 2022
Book
Paperback/Softback
XIV, 436 pages
978-3-031-15073-9 (ISBN)
Description
This book constitutes the proceedings of the 22
st
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2021, which took place in July 2022 in Samos, Greece.
The 21 full papers presented in this volume were carefully reviewed and selected from 44 submissions. The papers are organized in topics as follows: High level synthesis; memory systems; processor architecture; embedded software systems and beyond; deep learning optimization; extra-functional property estimation; innovative architectures and tools for security; european research projects on digital systems, services, and platforms.
The 21 full papers presented in this volume were carefully reviewed and selected from 44 submissions. The papers are organized in topics as follows: High level synthesis; memory systems; processor architecture; embedded software systems and beyond; deep learning optimization; extra-functional property estimation; innovative architectures and tools for security; european research projects on digital systems, services, and platforms.
More details
Series
Edition
1st ed. 2022
Language
English
Place of publication
Cham
Switzerland
Publishing group
Springer International Publishing
Target group
Professional and scholarly
Illustrations
31 s/w Abbildungen
XIV, 436 p. 31 illus.
Dimensions
Height: 235 mm
Width: 155 mm
Thickness: 25 mm
Weight
680 gr
ISBN-13
978-3-031-15073-9 (9783031150739)
DOI
10.1007/978-3-031-15074-6
Schweitzer Classification
Other editions
Additional editions
Alex Orailoglu | Marc Reichenbach | Matthias Jung
Embedded Computer Systems: Architectures, Modeling, and Simulation
22nd International Conference, SAMOS 2022, Samos, Greece, July 3-7, 2022, Proceedings
E-Book
08/2022
Springer
€90.94
Available for download
Content
High Level Synthesis.- High-Level Synthesis of Digital Circuits from Template Haskell and SDF-AP 1 H. H. .- Implementing Synthetic Aperture Radar Backprojection in Chisel - A Field Report.-EasyHBM: Simple and Fast HBM Access for FPGAs using High-Level Synthesis.- Memory Systems.- TREAM: A Tool for Evaluating Error Resilience of Tree-based Models using Approximate Memory.-Split'n'Cover: ISO 26262 Hardware Safety Analysis with SystemC.- Tagged Geometric History Length Access Interval Prediction for Tightly Coupled Memory Systems.- Processor Architecture.-NanoController: A Minimal and Flexible Processor Architecture for UltraLow-Power.- ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration.- Embedded Software Systems and beyond.-CASA: An Approach for exposing and documenting Concurrency-related Software Properties.- High-Level Simulation of Embedded Software Vulnerabilities to EM SideChannel Attacks.- Deep Learning Optimization I.-A Design Space Exploration Methodology for Enabling Tensor Train Decomposition in Edge Devices.- Study of DNN-based Ragweed Detection from Drones.- PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-Core MCUs through Performance-Driven Autotuning.-Extra-functional Property Estimation.- The Impact of Dynamic Storage Allocation on CPython Execution Time, Memory Footprint and Energy Consumption: An Empirical Study.- Application runtime estimation for AURIX embedded MCU using deep learning.-A Hybrid Performance Prediction Approach for Fully-Connected Artificial Neural Networks on Multi-Core Platforms.- Deep Learning Optimization I.- A Smart HW-Accelerator for Non-Uniform Linear Interpolation of MLActivation Functions.-Hardware-Aware Evolutionary Filter Pruning.- Innovative Architectures and tools for Security.- Obfuscating the Hierarchy of a Digital IP.-On the effectiveness of true random number generators implemented on FPGAs.- Power and Energy.- SIDAM: A Design Space Exploration Framework for Multi-Sensor Embedded Systems Powered by Energy Harvesting.- A Data-Driven Approach to Lightweight DVFS-Aware Counter-Based Power Modeling for Heterogeneous Platforms.