Verilog Computer-Based Training Course
Published on 30. April 2002
Book
Mixed media product
978-0-07-137473-6 (ISBN)
Description
Master the complete Verilog language for simulation and synthesis in just over 50 hours or spend 25 hours to learn the synthesizable Verilog! McGraw-Hill's "Verilog Computer Based Training Course" is a powerful self-training program complete with Verilog simulation and synthesis tools from Mentor Graphics and Altera. Quizzes with answers and projects are also available on the course web site. This unique learning package delivers everything a professional engineer or computer or electronics engineering student needs.
More details
Language
English
Place of publication
United States
Publishing group
McGraw-Hill Education - Europe
Target group
Professional and scholarly
Dimensions
Height: 246 mm
Width: 206 mm
Thickness: 33 mm
Weight
525 gr
ISBN-13
978-0-07-137473-6 (9780071374736)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Person
Zainalabedin Navabi, Ph.D., is professor of electrical and computer engineering at Northeastern University and the author of Verilog Digital System Design and both editions of VHDL: Analysis and Modeling of Digital Systems, all published by McGraw-Hill. Since 1981, Dr. Navabi has worked in the design, definition, and implementation of hardware description languages and the synthesis and testing of digital systems. He has developed and supervised the development of many HDL-related software packages and tools, and has directed projects in VLSI design, test synthesis, simulation, synthesis, and other aspects of digital system design automation. He has served as a consultant for several EDA companies developing HDL-based tools and environments. Dr. Navabi is a member of ACM, IEEE, and IEEE Computer Society, and is an active participant in the IEEE DASC committee that sets standards related to hardware description languages.
Content
Role of HDLs in design; top-down introduction to Verilog; Verilog for description of logic circuits;Verilog language constructs; Verilog circuit templates; active test benches; Verilog language grammar.