Graphics Processing Unit
Algorithm, Architecture, and Power
1st Edition
Published on 15. November 2014
Book
Hardback
225 pages
978-1-4398-6265-0 (ISBN)
Description
This is a practical reference for a complete handheld graphics system on a chip, with an emphasis on a low-power and cost-effective design approach that will play a dominant role in handheld computing in forthcoming decades. The book focuses on the realization of 3D graphics on wireless handheld devices. It covers topics from handheld graphics systems to circuit design techniques developed in accordance with the design constraints imposed by the handsets. The book exposes the design process of the graphics processing unit (GPU) by going through specific design techniques for each component and by adding each to the GPU. It covers cost-effective handheld GPU design from concept, algorithm, and architecture to its circuit design. The book also discusses related works from industry and academia.
More details
Language
English
Place of publication
Bosa Roca
United States
Publishing group
Taylor & Francis Inc
Target group
College/higher education
Industry professionals working on handheld graphics processors and application processor systems-on-a-chip (SoCs); industry professionals working on handsets.
Illustrations
50 s/w Abbildungen
50 Illustrations, black and white
Dimensions
Height: 234 mm
Width: 156 mm
ISBN-13
978-1-4398-6265-0 (9781439862650)
Copyright in bibliographic data is held by Nielsen Book Services Limited or its licensors: all rights reserved.
Schweitzer Classification
Persons
Content
Introduction to Handheld 3D Graphics: Handheld Devices for 3D Graphics. 3D Graphics Pipeline. Mobile Graphics APIs. Handheld GPUs. Computer Arithmetic for Handheld 3D Graphics: Arithmetic Operations in 3D Graphics. Fixed-Point Arithmetic. Floating-Point Arithmetic. Logarithmic Arithmetic. Unified Arithmetic Unit for Programmable Handheld 3D Graphics: Fixed-Point Hybrid Number System (FXP-HNS). FXP-HNS Multifunction Unit. Floating-Point Hybrid Number System (FLP-HNS). FLP-HNS Multifunction Unit. Programming Model of 3D Graphics Pipeline: Stream Processing Model. Stream Processor Architecture. Shader Models. Shader Architecture: Instruction Set Architecture. Microarchitecture. Rendering Engine: Overall Organization. Arithmetic Unit Design. Memory Bandwidth Control Strategies. GPU Power Management: Multiple Power-Domain Dynamic Voltage and Frequency Scaling (DVFS). Power Management Unit. Putting It All Together: Handheld GPU: Performance Evaluations. Implementation. Comparison. Perspectives on Handheld GPUs.