Modeling and Simulation for Microelectronic Packaging Assembly
Manufacturing, Reliability and Testing
Will be published approx. on 21. October 2011
Book
Hardback
592 pages
978-0-470-82780-2 (ISBN)
Description
Although there is increasing need for modeling and simulation in the IC package design phase, most assembly processes and various reliability tests are still based on the time consuming "test and try out" method to obtain the best solution. Modeling and simulation can easily ensure virtual Design of Experiments (DoE) to achieve the optimal solution. This has greatly reduced the cost and production time, especially for new product development. Using modeling and simulation will become increasingly necessary for future advances in 3D package development. In this book, Liu and Liu allow people in the area to learn the basic and advanced modeling and simulation skills to help solve problems they encounter.
* Models and simulates numerous processes in manufacturing, reliability and testing for the first time
* Provides the skills necessary for virtual prototyping and virtual reliability qualification and testing
* Demonstrates concurrent engineering and co-design approaches for advanced engineering design of microelectronic products
* Covers packaging and assembly for typical ICs, optoelectronics, MEMS, 2D/3D SiP, and nano interconnects
* Appendix and color images available for download from the book's companion website
Liu and Liu have optimized the book for practicing engineers, researchers, and post-graduates in microelectronic packaging and interconnection design, assembly manufacturing, electronic reliability/quality, and semiconductor materials. Product managers, application engineers, sales and marketing staff, who need to explain to customers how the assembly manufacturing, reliability and testing will impact their products, will also find this book a critical resource.
Appendix and color version of selected figures can be found at www.wiley.com/go/liu/packaging
More details
Product info
gebunden
Edition
1. Auflage
Language
English
Place of publication
New York
United States
Target group
Professional and scholarly
Product notice
sewn/stitched
Paper over boards
Dimensions
Height: 235 mm
Width: 157 mm
Thickness: 36 mm
Weight
993 gr
ISBN-13
978-0-470-82780-2 (9780470827802)
Schweitzer Classification
Other editions
Additional editions
Sheng Liu | Yong Liu
Modeling and Simulation for Microelectronic Packaging Assembly
Manufacturing, Reliability and Testing
E-Book
08/2011
Wiley
€107.99
Available for download
Sheng Liu | Yong Liu
Modeling and Simulation for Microelectronic Packaging Assembly
Manufacturing, Reliability and Testing
E-Book
08/2011
Wiley
€107.99
Available for download
Person
Sheng Liu is a ChangJiang Professor of Mechanical Engineering at Huazhong University of Science and Technology. He holds a dual appointment at Wuhan National Laboratory for Optoelectronics, and has served as tenured faculty at Wayne State University. He has over 14 years experience in LED/MEMS/IC packaging and extensive experience in consulting with many leading multi-national and Chinese companies. Liu was awarded the White House/NSF Presidential Faculty Fellowship in 1995, ASME Young Engineer Award in 1996, and China NSFC Overseas Young Scientist in 1999. He is currently one of the 11 National Committee Members in LED under Ministry of Science and Technology. He obtained a Ph.D. from Stanford in 1992, and got MS and BS in flight vehicle design, Nanjing University of Aeronautics and Astronautics, and he had three years industrial experience in China and USA. He has filed more than 70 patents in China and the USA, and has published more than 300 technical articles.
Yong Liu is a global team leader of electrical, thermal-mechanical modeling and analysis at Fairchild Semiconductor Corp in South Portland, Maine. His main interest areas are IC packaging, modeling and simulation, reliability and material characterization. He has previously served as Professor at Zhejiang University of Technology, and has worked as an opto package engineer at Nortel Networks in Boston. Liu has co-authored over 100 papers in journals and conferences, has filed over 40 US patents in the area of IC packaging and power device, and has won numerous awards and fellowships in academia and industry: the Fairchild President Award, Fairchild Key Technologist, Fairchild New Product Innovation Award, the Alexander von Humboldt European Fellowship for study at Braunschweig University of Technology and University of Cambridge. Liu holds a PhD from Nanjing University of Science and Technology.
Yong Liu is a global team leader of electrical, thermal-mechanical modeling and analysis at Fairchild Semiconductor Corp in South Portland, Maine. His main interest areas are IC packaging, modeling and simulation, reliability and material characterization. He has previously served as Professor at Zhejiang University of Technology, and has worked as an opto package engineer at Nortel Networks in Boston. Liu has co-authored over 100 papers in journals and conferences, has filed over 40 US patents in the area of IC packaging and power device, and has won numerous awards and fellowships in academia and industry: the Fairchild President Award, Fairchild Key Technologist, Fairchild New Product Innovation Award, the Alexander von Humboldt European Fellowship for study at Braunschweig University of Technology and University of Cambridge. Liu holds a PhD from Nanjing University of Science and Technology.
Content
Foreword by C. P. Wong xiii
Foreword by Zhigang Suo xv
Preface xvii
Acknowledgments xix
About the Authors xxi
Part I Mechanics and Modeling 1
1 Constitutive Models and Finite Element Method 3
1.1 Constitutive Models for Typical Materials 3
1.2 Finite Element Method 9
1.3 Chapter Summary 18
References 19
2 Material and Structural Testing for Small Samples 21
2.1 Material Testing for Solder Joints 21
2.2 Scale Effect of Packaging Materials 32
2.3 Two-Ball Joint Specimen Fatigue Testing 41
2.4 Chapter Summary 41
References 43
3 Constitutive and User-Supplied Subroutines for Solders Considering Damage Evolution 45
3.1 Constitutive Model for Tin-Lead Solder Joint 45
3.2 Visco-Elastic-Plastic Properties and Constitutive Modeling of Underfills 50
3.3 A Damage Coupling Framework of Unified Viscoplasticity for the Fatigue of Solder Alloys 56
3.4 User-Supplied Subroutines for Solders Considering Damage Evolution 67
3.5 Chapter Summary 76
References 76
4 Accelerated Fatigue Life Assessment Approaches for Solders in Packages 79
4.1 Life Prediction Methodology 79
4.2 Accelerated Testing Methodology 82
4.3 Constitutive Modeling Methodology 83
4.4 Solder Joint Reliability via FEA 84
4.5 Life Prediction of Flip-Chip Packages 93
4.6 Chapter Summary 99
References 99
5 Multi-Physics and Multi-Scale Modeling 103
5.1 Multi-Physics Modeling 103
5.2 Multi-Scale Modeling 106
5.3 Chapter Summary 107
References 108
6 Modeling Validation Tools 109
6.1 Structural Mechanics Analysis 109
6.2 Requirements of Experimental Methods for Structural Mechanics Analysis 111
6.3 Whole Field Optical Techniques 112
6.4 Thermal Strains Measurements Using Moire Interferometry 113
6.5 In-Situ Measurements on Micro-Machined Sensors 116
6.6 Real-Time Measurements Using Speckle Interferometry 119
6.7 Image Processing and Computer Aided Optical Techniques 120
6.8 Real-Time Thermal-Mechanical Loading Tools 123
6.9 Warpage Measurement Using PM-SM System 124
6.10 Chapter Summary 131
References 131
7 Application of Fracture Mechanics 135
7.1 Fundamental of Fracture Mechanics 135
7.2 Bulk Material Cracks in Electronic Packages 141
7.3 Interfacial Fracture Toughness 148
7.4 Three-Dimensional Energy Release Rate Calculation 159
7.5 Chapter Summary 165
References 165
8 Concurrent Engineering for Microelectronics 169
8.1 Design Optimization 169
8.2 New Developments and Trends in Integrated Design Tools 179
8.3 Chapter Summary 183
References 183
Part II Modeling in Microelectronic Packaging and Assembly 185
9 Typical IC Packaging and Assembly Processes 187
9.1 Wafer Process and Thinning 188
9.2 Die Pick Up 193
9.3 Die Attach 198
9.4 Wire Bonding 206
9.5 Molding 223
9.6 Leadframe Forming/Singulation 241
9.7 Chapter Summary 252
References 252
10 Opto Packaging and Assembly 255
10.1 Silicon Substrate Based Opto Package Assembly 255
10.2 Welding of a Pump Laser Module 258
10.3 Chapter Summary 264
References 264
11 MEMS and MEMS Package Assembly 267
11.1 A Pressure Sensor Packaging (Deformation and Stress) 267
11.2 Mounting of Pressure Sensor 273
11.3 Thermo-Fluid Based Accelerometer Packaging 279
11.4 Plastic Packaging for a Capacitance Based Accelerometer 288
11.5 Tire Pressure Monitoring System (TPMS) Antenna 303
11.6 Thermo-Fluid Based Gyroscope Packaging 310
11.7 Microjets for Radar and LED Cooling 316
11.8 Air Flow Sensor 327
11.9 Direct Numerical Simulation of Particle Separation by Direct Current Dielectrophoresis 335
11.10 Modeling of Micro-Machine for Use in Gastrointestinal Endoscopy 341
11.11 Chapter Summary 353
References 354
12 System in Package (SIP) Assembly 361
12.1 Assembly Process of Side by Side Placed SIP 361
12.2 Impact of the Nonlinear Materials Behaviors on the Flip-Chip Packaging Assembly Reliability 369
12.3 Stacked Die Flip-Chip Assembly Layout and the Material Selection 381
12.4 Chapter Summary 393
References 393
Part III Modeling in Microelectronic Package Reliability and Test 395
13 Wafer Probing Test 397
13.1 Probe Test Model 397
13.2 Parameter Probe Test Modeling Results and Discussions 400
13.3 Comparison Modeling: Probe Test versus Wire Bonding 406
13.4 Design of Experiment (DOE) Study and Correlation of Probing Experiment and FEA Modeling 409
13.5 Chapter Summary 411
References 412
14 Power and Thermal Cycling, Solder Joint Fatigue Life 413
14.1 Die Attach Process and Material Relations 413
14.2 Power Cycling Modeling and Discussion 413
14.3 Thermal Cycling Modeling and Discussion 420
14.4 Methodology of Solder Joint Fatigue Life Prediction 426
14.5 Fatigue Life Prediction of a Stack Die Flip-Chip on Silicon (FSBGA) 427
14.6 Effect of Cleaned and Non-Cleaned Situations on the Reliability of Flip-Chip Packages 434
14.7 Chapter Summary 438
References 439
15 Passivation Crack Avoidance 441
15.1 Ratcheting-Induced Stable Cracking: A Synopsis 441
15.2 Ratcheting in Metal Films 445
15.3 Cracking in Passivation Films 447
15.4 Design Modifications 452
15.5 Chapter Summary 452
References 452
16 Drop Test 453
16.1 Controlled Pulse Drop Test 453
16.2 Free Drop 460
16.3 Portable Electronic Devices Drop Test and Simulation 467
16.4 Chapter Summary 470
References 471
17 Electromigration 473
17.1 Basic Migration Formulation and Algorithm 473
17.2 Electromigration Examples from IC Device and Package 477
17.3 Chapter Summary 496
References 497
18 Popcorning in Plastic Packages 499
18.1 Statement of Problem 499
18.2 Analysis 501
18.3 Results and Comparisons 503
18.4 Chapter Summary 515
References 516
Part IV Modern Modeling and Simulation Methodologies: Application to Nano Packaging 519
19 Classical Molecular Dynamics 521
19.1 General Description of Molecular Dynamics Method 521
19.2 Mechanism of Carbon Nanotube Welding onto the Metal 522
19.3 Applications of Car-Parrinello Molecular Dynamics 530
19.4 Nano-Welding by RF Heating 544
19.5 Chapter Summary 548
References 548
Index 553