Applied Reconfigurable Computing. Architectures, Tools, and Applications
Description
This book constitutes the proceedings of the 22nd International Symposium on Applied Reconfigurable Computing, ARC 2026, held in Cagliari, Sardinia, Italy, during April 8-10, 2026.
The 19 full papers and 1 short papers included in this book were carefully reviewed and selected from 33 submissions. The symposium also featured two special sessions, devoted to Accelerating Physical AI with Event-driven Reconfigurable Hardware for Neuromorphic Perception and to Collaborative Projects, highlighting emerging architectures and applications in reconfigurable computing. The contributions presented during the special sessions are included as invited papers in these proceedings.
The papers were organized in topical sections as follows: Architectures and Accelerators; Softcores and Optimization; Neural Networks and Artificial Intelligence; Design Tools; Applications; Accelerating Physical AI with Event-driven Reconfigurable Hardware for Neuromorphic Perception; and Collaborative Projects.
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Content
.- Architectures and Accelerators
.- Fit for the Edge: Resource- and Power-Efficient Multi-Stream Anomaly Detection on FPGAs.
.- High Performance Convolutional Neural Network Acceleration on Versal AI Edge Devices for Real Time DC Series Arc Fault Detection.
.- LiveFIFO: FPGA-in-the-Loop Buffer Sizing for Dataflow Accelerators.
.- StreamLearn-FPGA: An Elastic Weight Consolidation Accelerator for Online Continual Learning on Reconfigurable SoCs.
.- Softcores and Optimization
.- FACETs: Fast and Efficient Compilation for Control-Dataflow Mapping on CGRAs.
.- Characterising Physical Memory Access Pattern Impact on RISC-V Softcore Performance: A Microbenchmark Study.
.- JACABench- The JACA Benchmark Suite for Embedded Computing.
.- Neural Networks and Artificial Intelligence
.- End-to-End Keyword Spotting on FPGA Using Graph Neural Networks with a Neuromorphic Auditory Sensor.
.- A Compact Spiking Neural Network for Real-Time Swimming Style Recognition on Low-Power FPGA.
.- Enabling Plasticity in FPGA-based SNNs: an EEG Seizure Detection Study.
.- Optimizing FPGA-based Neural Network Ensemble.
.- AI-Guided DSE of GEMM Kernels for Vision Transformers on FPGA-Based Edge Platforms.
.- Arrhythmia Classification at the Edge Using a Weightless Neural Network Hardware Accelerator.
.- Design Tools
.- Learning Based Presilicon Estimation of Design Area from Early EDA Metrics.
.- Revisiting Priority Cuts for Technology Mapping of LUT-based FPGAs.
.- CLAS: A Cross-Layer Approximate Synthesis Framework for LUT-based DNN Accelerators.
.- Applications
.- Exploiting Sum-Product Networks to Offload Database Query Cardinality Estimation to FPGA-based Smart Storage Devices.
.- FPGA-SORT: Complete Hardware Pipeline for Real-Time Multi-Object Tracking.
.- FPGA-Based Hardware Architecture for Contrast Maximization in Event-Based Vision.
.- Multiplier-Free Robust Adaptive Beamforming for UAV Radars: A Double-Shift PoT Approach.
.- Accelerating Physical AI with Event-driven Reconfigurable Hardware for Neuromorphic Perception
.- Neuromorphic robot controller on FPGA for supporting SNN-based smooth trajectories.
.- Collaborative Projects
.- Hierarchical Reconfiguration Across the Edge-Cloud Continuum: An Architectural Perspective from H2TRAIN.
.- MYRTUS: A Preliminary Assessment of the Heterogeneous Computing Continuum Infrastructure.
.- NimbleAI: Enabling Europe's Strategic Sovereignty through Neuromorphic Technology.
.- SIMON: Intelligent system for automatic selection of machine learning algorithms in social sciences.