
EDA for IC Implementation, Circuit Design, and Process Technology
CRC Press
1st Edition
Published on 23. March 2006
Book
Hardback
616 pages
978-0-8493-7924-6 (ISBN)
Description
Presenting a comprehensive overview of the design automation algorithms, tools, and methodologies used to design integrated circuits, the Electronic Design Automation for Integrated Circuits Handbook is available in two volumes. The second volume, EDA for IC Implementation, Circuit Design, and Process Technology, thoroughly examines real-time logic to GDSII (a file format used to transfer data of semiconductor physical layout), analog/mixed signal design, physical verification, and technology CAD (TCAD). Chapters contributed by leading experts authoritatively discuss design for manufacturability at the nanoscale, power supply network design and analysis, design modeling, and much more. Save on the complete set.
More details
Series
Language
English
Place of publication
Bosa Roca
United States
Publishing group
Taylor & Francis Inc
Target group
Professional and scholarly
Professional
Illustrations
333 s/w Abbildungen, 17 farbige Abbildungen, 3 s/w Photographien bzw. Rasterbilder, 14 s/w Tabellen
14 Tables, black and white; 3 Halftones, black and white; 17 Illustrations, color; 333 Illustrations, black and white
Dimensions
Height: 260 mm
Width: 183 mm
Thickness: 37 mm
Weight
1337 gr
ISBN-13
978-0-8493-7924-6 (9780849379246)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions

Luciano Lavagno | Louis Scheffer | Grant Martin
EDA for IC Implementation, Circuit Design, and Process Technology
E-Book
10/2018
1st Edition
CRC Press
€225.99
Available for download

Louis Scheffer | Luciano Lavagno | Grant Martin
EDA for IC Implementation, Circuit Design, and Process Technology
E-Book
10/2018
1st Edition
CRC Press
€225.99
Available for download
Persons
Luciano Lavagno, Louis Scheffer, Grant Martin
Editor
Cadence Berkeley Laboratories, California, USA
Cadence Design Systems, San Jose, California, USA
Tensilica Inc., Santa Clara, California, USA
Content
Design Flows. Logic Synthesis. Power Analysis and Optimization from Circuit to Register Transfer Levels. Equivalence checking. Digital Layout - Placement. Static Timing Analysis. Structured Digital Design. Routing. Exploring Challenges of Libraries for Electronic Design. Design Closure. Tools for Chip-Package Codesign. Design Databases. FPGA Synthesis and Physical Design. Simulation of Analog and Radio Frequency Circuits and Systems. Simulation and Modeling for Analog and Mixed-Signal Integrated Circuits. Layout Tools for Analog ICs and Mixed-Signal SoCs. Design Rule Checking. Resolution Enhancement Technology and Mask Data Preparation. Design for Manufacturability in the Nanometer Era. Power Supply Network Design and Analysis. Noise Considerations in Digital ICs. Layout Extraction. Mixed-Signal Noise Coupling in System-on-Chip Design: Modeling, Analysis and Validation. Process Simulation. Device Modeling: From Physics to Electrical Parameter Extraction. High-Accuracy Parasitic Extraction.