Theorem Provers in Circuit Design: Theory, Practice and Experience
Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26-28, 1994. Proceedings
Published on 6. March 1995
Book
Paperback/Softback
VIII, 312 pages
978-3-540-59047-7 (ISBN)
Description
This volume presents the proceedings of the Second International Conference on Theorem Provers in Circuit Design (TPCD '94) jointly organized by the Forschungszentrum Informatik (University of Karlsruhe) and IFIP Working Group 10.2 in Bad Herrenalb, Germany in September 1994.
The 19 papers included are thoroughly revised versions of the submissions selected for presentation at the conference and address all current aspects of theorem provers in circuit design. Particular emphasis is given to benchmark-circuits for hardware verification; tutorials on two popular theorem provers are included.
The 19 papers included are thoroughly revised versions of the submissions selected for presentation at the conference and address all current aspects of theorem provers in circuit design. Particular emphasis is given to benchmark-circuits for hardware verification; tutorials on two popular theorem provers are included.
More details
Series
Edition
1995 ed.
Language
English
Place of publication
Berlin
Germany
Publishing group
Springer Berlin
Target group
Professional and scholarly
Research
Illustrations
VIII, 312 p.
Dimensions
Height: 235 mm
Width: 155 mm
Thickness: 18 mm
Weight
487 gr
ISBN-13
978-3-540-59047-7 (9783540590477)
DOI
10.1007/3-540-59047-1
Schweitzer Classification
Content
Benchmark-circuits for hardware-verification.- Reasoning about pipelines with structural hazards.- A correctness model for pipelined microprocessors.- Non-restoring integer square root: A case study in design by principled optimization.- An automatic generalization method for the inductive proof of replicated and parallel architectures.- A compositional circuit model and verification by composition.- Exploiting structural similarities in a BDD-based verification method.- Studies of the single pulser in various reasoning systems.- Mechanized verification of speed-independence.- Automatic correctness proof of the implementation of synchronous sequential circuits using an algebraic approach.- Mechanized verification of refinement.- Effective theorem proving for hardware verification.- A formal framework for high level synthesis.- Tutorial on design verification with synchronized transitions.- A tutorial on using PVS for hardware verification.- A reduced instruction set proof environment.-Quantitative evaluation of formal based synthesis in ASIC design.- Formal verification of characteristic properties.- Extending formal reasoning with support for hardware diagrams.