Direct Digital Frequency Synthesizers
1st Edition
Published on 11. November 1998
Book
Paperback/Softback
400 pages
978-0-7803-3438-0 (ISBN)
Description
With the advent of integrated circuits (IC), digital systems havebecome widely used in modern electronic devices, includingcommunications and measurement equipment. Direct Digital FrequencySynthesizers (DDS) are used in communications as transmitterexciters and local oscillators in receivers. The advantages aresuperior frequency stability, the same as that of the driving clockoscillator, and short switching times. The difficulties are loweroutput frequencies and rather large spurious signals.
Compiled for practicing engineers who do not have theprerequisite of a specialist's knowledge in Direct DigitalFrequency Synthesizers (DDS), this collection of 40 importantreprinted papers and 9 never-before published contributionspresents a comprehensive introduction to DDS properties and a clearunderstanding of actual devices. The information in this volume canlead to easier computer simulations and improved designs.
Featured topics include:
* Discussion of principles and state of the art of wide-rangeDDS
* Investigation of spurious signals in DDS
* Combination of DDS with Phase Lock Loops (PLL)
* Examination of phase and background 'noise' in DDS
* Introduction to Digital to Analog Conversion (DAC)
* Analysis of mathematics of quasiperiodic omission ofpulses
DDFS can also serve as a textbook for students seeking essentialbackground theory.
Compiled for practicing engineers who do not have theprerequisite of a specialist's knowledge in Direct DigitalFrequency Synthesizers (DDS), this collection of 40 importantreprinted papers and 9 never-before published contributionspresents a comprehensive introduction to DDS properties and a clearunderstanding of actual devices. The information in this volume canlead to easier computer simulations and improved designs.
Featured topics include:
* Discussion of principles and state of the art of wide-rangeDDS
* Investigation of spurious signals in DDS
* Combination of DDS with Phase Lock Loops (PLL)
* Examination of phase and background 'noise' in DDS
* Introduction to Digital to Analog Conversion (DAC)
* Analysis of mathematics of quasiperiodic omission ofpulses
DDFS can also serve as a textbook for students seeking essentialbackground theory.
More details
Language
English
Place of publication
United States
Publishing group
John Wiley & Sons Inc
Target group
College/higher education
Professional and scholarly
Product notice
Paperback (trade)
Unsewn / adhesive bound
Cloth over boards
Dimensions
Height: 280 mm
Width: 210 mm
Thickness: 21 mm
Weight
965 gr
ISBN-13
978-0-7803-3438-0 (9780780334380)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Person
Venceslav F. Kroupa has been affiliated with the Institute of Radio Engineering and Electronics of the Academy of Sciences in the Czech Republic since 1955. He has previously written four books and has published over 100 papers on the subjects of standard time and frequency; frequency stability and noise; frequency synthesis; and precise frequency measurement. Dr. Kroupa holds 15 patents and has received awards from the Czechoslovak Academy of Sciences in 1969 and 1974. He is a member of IEEE Ultrasonics, Ferroelectrics, and Frequency Control Society.
Content
Preface. Part I Introduction and Tutorial.
Synthesis Technique (V. F. Kroupa).
Part II Direct Digital Single-Frequency Synthesizers.
A Frequency Synthesizer for 10/27T kHz (G. W. Small, IEEE Transactions on Instrumentation and Measurement, March 1973).
Approximating Frequency Synthesizers (V. F. Kroupa, IEEE Transactions on Instrumentation and Measurement, December 1974).
Part III Wide-Range Direct Digital Frequency Synthesizers.
A Digital Frequency Synthesizer (J. Tierney, C. M. Radre, and B. Gold, IEEE Transactions on Audio and Electroacoustics, March 1971).
CMOS/SOS Frequency Synthesizer LSI Circuit for Spread Spectrum Communications (D. A. Sunderland, R. A. Strauch, S. S. Wharfield, H. T. Peterson, and C. R. Cole, IEEE Journal of Solid-State Circuits, August 1984).
A High-Speed Direct Frequency Synthesizer (P. H. Saul and D. G. Taylor, IEEE Journal of Solid-State Circuits, February 1990).
Single Chip 500 MHz Function Generator (P. H. Saul, W. Barber, D. G. Taylor, and T. Ward, IEE Proceedings-G, April 1991).
Low-Latency, High-Speed Numerically Controlled Oscillator Using Progression-of-States Technique (M. Thompson, IEEE Journal of Solid-State Circuits, January 1992).
Part IV Spurious Signals in Direct Digital Frequency Synthesizers.
Spectra of Pulse Rate Frequency Synthesizers (V. F. Kroupa, Proceedings of the IEEE, December 1979).
Noise Spectra of Digital Sine-Generators Using the Table-Lookup Method (S. Mehrgardt, IEEE Transactions on Acoustics, Speech, and Signal Processing, August 1983).
An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation (H. T. Nicholas III, and H. Samueli, Proceedings of the 41st Annual Frequency Control Symposium, 1987).
The Optimization of Direct Digital Frequency Synthesizer Performance in the Presence of Finite Word Length Effects (H. T. Nicholas III, H. Samueli, and B. Kim, Proceedings of the 42nd Annual Frequency Control Symposium, 1988).
Methods of Mapping From Phase to Sine Amplitude in Direct Digital Synthesis (J. Vankka, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, March 1997).
A 150-MHz Direct Digital Frequency Synthesizer in 1.25-j/,m CMOS with -90-dBc Spurious Performance (H. T. Nicholas III, and H. Samueli, IEEE Journal of Solid-State Circuits, December 1991).
An Exact Spectral Analysis of a Number Controlled Oscillator Based Synthesizer (J. F. Garvey and D. Babitch, Proceedings of the 44th Annual Frequency Control Symposium, 1990).
Part V Reduction of Spurious Signals in Direct Digital Frequency Synthesizers.
Spurious Suppression in Direct Digital Synthesizers (C. E. Wheatley and D. E. Phillips, Proceedings of the 35th Annual Frequency Control Symposium, 1981).
A Low-Frequency, High Resolution Digital Synthesizer (R. P. Giffard and L. S. Cutler, Proceedings-IEEE International Frequency Control Symposium, 1997).
A Spurious Reduction Technique for High-Speed Direct Digital Synthesizers (L. J. Kushner and M. T. Ainsworth, Proceedings of the IEEE International Frequency Control Symposium, 1996).
A Direct-Digital Synthesizer with Improved Spectral Performance (P. O'Leary and F. Maloberti, IEEE Transactions on Communications, July 1991).
Spur-Reduced Digital Sinusoid Synthesis (M. J. Flanagan and G. A. Zimmerman, IEEE Transactions on Communications, July 1995).
Spectral Properties of DDFS: Computer Simulations and Experimental Verifications (V. F. Kroupa, Adaptation: 1993 and 1994 IEEE International Frequency Control Symposia and the 8th European Frequency and Time Forum, March 1994).
Part VI Combination of DDFS with Phase Locked Loops (PLLs).
Principles of Phase Locked Loops (PLL) (V. F. Kroupa, A specially written paper for this volume).
Low-Noise Microwave-Frequency Synthesizers: Design Principles (V. F. Kroupa, IEE Proceeding-H, December 1983).
A J-Band Spread-Spectrum Synthesizer Using a Combination of DDS and Phaselock Techniques (M. V. Harris, Colloquium on "Direct Digital Frequency Synthesis," IEEE Digest No: 1991/172, November 1991).
Principles of Fractional-N Frequency Synthesizers (V. F. Kroupa, A specially written paper for this volume).
A Multiple Modulator Fractional Divider (B. Miller and R. J. Conley, IEEE Transactions on Instrumentation and Measurements). June 1991.
A Fast-Settling GaAs-Enhanced Frequency Synthesizer (J. F. Naber, H. P. Singh, W. J. Tanis, A. J. Koshar, and G. L. Segalla, IEEE Journal of Solid-State Circuits, October 1992).
Part VII Phase and Background Noise in DDFS.
Introduction to the Noise Properties of Frequency Sources (V. F. Kroupa, A specially written paper for this volume).
Close-to-the-Carrier Noise in DDFS (V. F. Kroupa, Based on a paper that originally appeared in the IEEE International Frequency Control Symposium, November 1996).
Phase Noise in Direct Digital Synthesizers (E. M. Mattison and L. M. Coyle, Proceedings of the 42nd Annual Frequency Control Symposium, 1988).
A Direct Digital Synthesizer with 100-MHz Output Capability (P. H. Saul and M. S. J. Mudd, IEEE Journal of Solid-State Circuits, June 1988).
An Analysis Methodology to Identify Dominant Noise Sources in D/A and A/D Converters (J. A. Connelly and K. P. Taylor, IEEE Transactions on Circuits and Systems, October 1991).
Part VIII Digital-to-Analog Converters.
Digital-to-Analog Converters (V. R Kroupa, A specially written paper for this volume).
A Monolithic 10-b Digital-to-Analog Converter Using Ion Implantation (G. Kelson, H. H. Stellrecht, and D. S. Perloff, IEEE Journal of Solid-State Circuits, December 1973).
An Inherently Monotonic 12 Bit DAC (J. A. Schoeff, IEEE Journal of Solid-State Circuits, December 1979).
An 8-Bit, 5 ns Monolithic D/A Converter Subsystem (P. H. Saul, P. J. Ward, and A. J. Fryers, IEEE Journal of Solid-State Circuits, December 1980).
A 500-MHz 8-Bit D/A Converter (K. Maio, S.-I. Hayashi, M. Hotta, T. Watanabe, W. Ueda, and N. Yokozawa, IEEE Journal of Solid-State Circuits, December 1985).
An 8-Bit 2-ns Monolithic DAC (T. Kamoto, Y. Akazawa, and M. Shinagawa, IEEE Journal of Solid-State Circuits, February 1988).
Part IX State of the Art and Some Applications.
A High Purity, High Speed Direct Digital Synthesizer (G. W. Kent and N.H. Sheng, Proceedings of the IEEE International Frequency Control Symposium, 1993).
A 200 MHz Quadrature Digital Synthesizer/Mixer in 0.8 /xm CMOS (L. K. Tan and H. Samueli, IEEE Journal of Solid-State Circuits, March 1995).
An 800-MHz Quadrature Digital Synthesizer with ECL-Compatible Output Drivers in 0.8 fxm CMOS (L. K. Tan, E. W. Roth, G. E. Yee, and H. Samueli, IEEE Journal of Solid-State Circuits, December 1995).
A Dual Frequency Synthesis Scheme for a High C-Field Cesium Resonator (E. Rubiola, A. Del Casale, A. De Marchi, Proceedings of the IEEE International Frequency Control Symposium, 1993).
Part X New Ideas for the DDFS Design.
A 700-MHz 24-b Pipelined Accumulator in 1.2-/xm CMOS for Applications as a Numerically Controlled Oscillator (F. Lu, H. Samueli, J. Yuan, and H. Svensson, IEEE Journal of Solid-State Circuits, August 1993).
An Integrated GaAs 1.25 GHz Clock Frequency FM-CW Direct Digital Synthesizer (N. Caglio, J.-L. Degouy, D. Meignant, P. Rousseau, and B. Leroux, IEEE GaAs Symposium, October 1993).
The Composite DDS--A New Direct Digital Synthesizer Architecture (L. J. Kushner, Proceedings of the IEEE International Frequency Control Symposium, 1993).
A Narrow Band High-Resolution Synthesizer Using a Direct Digital Synthesizer Followed by Repeated Dividing and Mixing (R. Karlquist, Proceedings of the IEEE International Frequency Control Symposium, 1995).
A 3 to 30 MHz High-Resolution Synthesizer Consisting of a DDS, Divide-and-Mix Modules, and a M/N Synthesizer (R. Kariquist, Proceedings of the IEEE International Frequency Control Symposium, 1996).
A New Architecture for a Sinewave Output DDS With a High Spectral Purity (L. Lo Presti, G. Cardamone, A. De Marchi, and E. Rubiola, 8th European Frequency and Time Forum, March 1994).
Part XI Mathematical Background.
Quasiperiodic Omission of Pulses (V. F. Kroupa, A specially written paper for this volume).
Useful Computer Programs for Investigations of Spurious Signals in DDFS (V. F. Kroupa, A specially written paper for this volume).
Author Index.
Subject Index.
About the Editor.
Synthesis Technique (V. F. Kroupa).
Part II Direct Digital Single-Frequency Synthesizers.
A Frequency Synthesizer for 10/27T kHz (G. W. Small, IEEE Transactions on Instrumentation and Measurement, March 1973).
Approximating Frequency Synthesizers (V. F. Kroupa, IEEE Transactions on Instrumentation and Measurement, December 1974).
Part III Wide-Range Direct Digital Frequency Synthesizers.
A Digital Frequency Synthesizer (J. Tierney, C. M. Radre, and B. Gold, IEEE Transactions on Audio and Electroacoustics, March 1971).
CMOS/SOS Frequency Synthesizer LSI Circuit for Spread Spectrum Communications (D. A. Sunderland, R. A. Strauch, S. S. Wharfield, H. T. Peterson, and C. R. Cole, IEEE Journal of Solid-State Circuits, August 1984).
A High-Speed Direct Frequency Synthesizer (P. H. Saul and D. G. Taylor, IEEE Journal of Solid-State Circuits, February 1990).
Single Chip 500 MHz Function Generator (P. H. Saul, W. Barber, D. G. Taylor, and T. Ward, IEE Proceedings-G, April 1991).
Low-Latency, High-Speed Numerically Controlled Oscillator Using Progression-of-States Technique (M. Thompson, IEEE Journal of Solid-State Circuits, January 1992).
Part IV Spurious Signals in Direct Digital Frequency Synthesizers.
Spectra of Pulse Rate Frequency Synthesizers (V. F. Kroupa, Proceedings of the IEEE, December 1979).
Noise Spectra of Digital Sine-Generators Using the Table-Lookup Method (S. Mehrgardt, IEEE Transactions on Acoustics, Speech, and Signal Processing, August 1983).
An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation (H. T. Nicholas III, and H. Samueli, Proceedings of the 41st Annual Frequency Control Symposium, 1987).
The Optimization of Direct Digital Frequency Synthesizer Performance in the Presence of Finite Word Length Effects (H. T. Nicholas III, H. Samueli, and B. Kim, Proceedings of the 42nd Annual Frequency Control Symposium, 1988).
Methods of Mapping From Phase to Sine Amplitude in Direct Digital Synthesis (J. Vankka, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, March 1997).
A 150-MHz Direct Digital Frequency Synthesizer in 1.25-j/,m CMOS with -90-dBc Spurious Performance (H. T. Nicholas III, and H. Samueli, IEEE Journal of Solid-State Circuits, December 1991).
An Exact Spectral Analysis of a Number Controlled Oscillator Based Synthesizer (J. F. Garvey and D. Babitch, Proceedings of the 44th Annual Frequency Control Symposium, 1990).
Part V Reduction of Spurious Signals in Direct Digital Frequency Synthesizers.
Spurious Suppression in Direct Digital Synthesizers (C. E. Wheatley and D. E. Phillips, Proceedings of the 35th Annual Frequency Control Symposium, 1981).
A Low-Frequency, High Resolution Digital Synthesizer (R. P. Giffard and L. S. Cutler, Proceedings-IEEE International Frequency Control Symposium, 1997).
A Spurious Reduction Technique for High-Speed Direct Digital Synthesizers (L. J. Kushner and M. T. Ainsworth, Proceedings of the IEEE International Frequency Control Symposium, 1996).
A Direct-Digital Synthesizer with Improved Spectral Performance (P. O'Leary and F. Maloberti, IEEE Transactions on Communications, July 1991).
Spur-Reduced Digital Sinusoid Synthesis (M. J. Flanagan and G. A. Zimmerman, IEEE Transactions on Communications, July 1995).
Spectral Properties of DDFS: Computer Simulations and Experimental Verifications (V. F. Kroupa, Adaptation: 1993 and 1994 IEEE International Frequency Control Symposia and the 8th European Frequency and Time Forum, March 1994).
Part VI Combination of DDFS with Phase Locked Loops (PLLs).
Principles of Phase Locked Loops (PLL) (V. F. Kroupa, A specially written paper for this volume).
Low-Noise Microwave-Frequency Synthesizers: Design Principles (V. F. Kroupa, IEE Proceeding-H, December 1983).
A J-Band Spread-Spectrum Synthesizer Using a Combination of DDS and Phaselock Techniques (M. V. Harris, Colloquium on "Direct Digital Frequency Synthesis," IEEE Digest No: 1991/172, November 1991).
Principles of Fractional-N Frequency Synthesizers (V. F. Kroupa, A specially written paper for this volume).
A Multiple Modulator Fractional Divider (B. Miller and R. J. Conley, IEEE Transactions on Instrumentation and Measurements). June 1991.
A Fast-Settling GaAs-Enhanced Frequency Synthesizer (J. F. Naber, H. P. Singh, W. J. Tanis, A. J. Koshar, and G. L. Segalla, IEEE Journal of Solid-State Circuits, October 1992).
Part VII Phase and Background Noise in DDFS.
Introduction to the Noise Properties of Frequency Sources (V. F. Kroupa, A specially written paper for this volume).
Close-to-the-Carrier Noise in DDFS (V. F. Kroupa, Based on a paper that originally appeared in the IEEE International Frequency Control Symposium, November 1996).
Phase Noise in Direct Digital Synthesizers (E. M. Mattison and L. M. Coyle, Proceedings of the 42nd Annual Frequency Control Symposium, 1988).
A Direct Digital Synthesizer with 100-MHz Output Capability (P. H. Saul and M. S. J. Mudd, IEEE Journal of Solid-State Circuits, June 1988).
An Analysis Methodology to Identify Dominant Noise Sources in D/A and A/D Converters (J. A. Connelly and K. P. Taylor, IEEE Transactions on Circuits and Systems, October 1991).
Part VIII Digital-to-Analog Converters.
Digital-to-Analog Converters (V. R Kroupa, A specially written paper for this volume).
A Monolithic 10-b Digital-to-Analog Converter Using Ion Implantation (G. Kelson, H. H. Stellrecht, and D. S. Perloff, IEEE Journal of Solid-State Circuits, December 1973).
An Inherently Monotonic 12 Bit DAC (J. A. Schoeff, IEEE Journal of Solid-State Circuits, December 1979).
An 8-Bit, 5 ns Monolithic D/A Converter Subsystem (P. H. Saul, P. J. Ward, and A. J. Fryers, IEEE Journal of Solid-State Circuits, December 1980).
A 500-MHz 8-Bit D/A Converter (K. Maio, S.-I. Hayashi, M. Hotta, T. Watanabe, W. Ueda, and N. Yokozawa, IEEE Journal of Solid-State Circuits, December 1985).
An 8-Bit 2-ns Monolithic DAC (T. Kamoto, Y. Akazawa, and M. Shinagawa, IEEE Journal of Solid-State Circuits, February 1988).
Part IX State of the Art and Some Applications.
A High Purity, High Speed Direct Digital Synthesizer (G. W. Kent and N.H. Sheng, Proceedings of the IEEE International Frequency Control Symposium, 1993).
A 200 MHz Quadrature Digital Synthesizer/Mixer in 0.8 /xm CMOS (L. K. Tan and H. Samueli, IEEE Journal of Solid-State Circuits, March 1995).
An 800-MHz Quadrature Digital Synthesizer with ECL-Compatible Output Drivers in 0.8 fxm CMOS (L. K. Tan, E. W. Roth, G. E. Yee, and H. Samueli, IEEE Journal of Solid-State Circuits, December 1995).
A Dual Frequency Synthesis Scheme for a High C-Field Cesium Resonator (E. Rubiola, A. Del Casale, A. De Marchi, Proceedings of the IEEE International Frequency Control Symposium, 1993).
Part X New Ideas for the DDFS Design.
A 700-MHz 24-b Pipelined Accumulator in 1.2-/xm CMOS for Applications as a Numerically Controlled Oscillator (F. Lu, H. Samueli, J. Yuan, and H. Svensson, IEEE Journal of Solid-State Circuits, August 1993).
An Integrated GaAs 1.25 GHz Clock Frequency FM-CW Direct Digital Synthesizer (N. Caglio, J.-L. Degouy, D. Meignant, P. Rousseau, and B. Leroux, IEEE GaAs Symposium, October 1993).
The Composite DDS--A New Direct Digital Synthesizer Architecture (L. J. Kushner, Proceedings of the IEEE International Frequency Control Symposium, 1993).
A Narrow Band High-Resolution Synthesizer Using a Direct Digital Synthesizer Followed by Repeated Dividing and Mixing (R. Karlquist, Proceedings of the IEEE International Frequency Control Symposium, 1995).
A 3 to 30 MHz High-Resolution Synthesizer Consisting of a DDS, Divide-and-Mix Modules, and a M/N Synthesizer (R. Kariquist, Proceedings of the IEEE International Frequency Control Symposium, 1996).
A New Architecture for a Sinewave Output DDS With a High Spectral Purity (L. Lo Presti, G. Cardamone, A. De Marchi, and E. Rubiola, 8th European Frequency and Time Forum, March 1994).
Part XI Mathematical Background.
Quasiperiodic Omission of Pulses (V. F. Kroupa, A specially written paper for this volume).
Useful Computer Programs for Investigations of Spurious Signals in DDFS (V. F. Kroupa, A specially written paper for this volume).
Author Index.
Subject Index.
About the Editor.