Scalable and Near-Optimal Design Space Exploration for Embedded Systems
Published on 23. August 2016
Book
Paperback/Softback
XVII, 277 pages
978-3-319-37830-5 (ISBN)
Description
This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.
More details
Edition
Softcover reprint of the original 1st ed. 2014
Language
English
Place of publication
Cham
Switzerland
Publishing group
Springer International Publishing
Target group
Professional and scholarly
Illustrations
78 s/w Abbildungen, 2 farbige Abbildungen
XVII, 277 p. 80 illus., 2 illus. in color.
Dimensions
Height: 235 mm
Width: 155 mm
Thickness: 17 mm
Weight
452 gr
ISBN-13
978-3-319-37830-5 (9783319378305)
DOI
10.1007/978-3-319-04942-7
Schweitzer Classification
Other editions
Additional editions
Angeliki Kritikakou | Francky Catthoor | Costas Goutis
Scalable and Near-Optimal Design Space Exploration for Embedded Systems
Book
04/2014
Springer
€106.99
Shipment within 10-15 days
Content
Introduction & Motivation.- Reusable DSE methodology for scalable & near-optimal frameworks.- Part I Background memory management methodologies.- Development of intra-signal in-place methodology.- Pattern representation.- Intra-signal in-place methodology for non-overlapping scenario.- Intra-signal in-place methodology for overlapping scenario.- Part II Processing related mapping methodologies.- Design-time scheduling techniques DSE framework.- Methodology to develop design-time scheduling techniques under constraints.- Design Exploration Methodology for Microprocessor & HW accelerators.- Conclusions & Future Directions.