Modeling and Simulation of MOSFET at Liquid Nitrogen Temperature

Since 1959 when Jack Kilby of Texas Instruments and Bob Noyce of Fairchild Semiconductor invented the integrated circuit, a hallmark of the semiconductor industry has been the continuous growth in chip performance and in the number of devices per chip. Only six years later in 1965, Gordon Moore, then of Fairchild, published his famous prediction that the number of devices on a chip would double every 12-18 months. This prediction, known as "Moore's Law", has become the yardstick against which are measured achievements in performance and packing density that come from shrinking the size of the MOSFET. This phenomenal scaling of device size - surpassing two orders of magnitude in the last 40 years - has provided the gains in performance and packing density that underlie the GHz microprocessors and SRAMs that exist today. The connection between increased performance and smaller devices faces challenges at both the device and circuit level. Although shorter MOSFETs can provide higher current densities, unless the parasitic resistances and capacitances associated with the devices and with the metal lines that interconnect the devices scale similarly, the device performance.