Thermal Onboard Detection of Power Semiconductor Interconnection Faults

Condition monitoring of power electronics increases the safety and reliability of autonomous driving and electrical vehicles. Therefore, this thesis presents a concept for the detection of assembly and interconnection faults in power semiconductors during operation. For this, a test vehicle is designed that includes a MOSFET and four adjacent temperature sensors placed on the top copper layer of a printed circuit board.

Multiple instances of the test devices are manipulated with different fault patterns in the solder layer between the semiconductor package and PCB or bond wire faults. A model is designed in a 3D FVM simulation environment to examine the effect of all failure cases on the junction temperature of the semiconductor and the temperature of the top copper layer of the PCB, which is measured by the temperature sensors. Based on this temperature pattern, three detection algorithms using the sensor readings are presented.

The experimental results show that large, coalesced solder faults and bond wire faults, which both are common degradation mechanisms, are reliably detected with the evaluation algorithms and their growth can be observed. In addition to the test vehicle, the fault detection algorithms are applied to two more industryrelated test specimen and show similar results. Furthermore, two machine-learning classification approaches are presented that detect severe solder defects with over 97 % accuracy on a dataset extended by the simulation of a large number of fault patterns.

The developed fault detection methods represent novel and feasible approaches for condition monitoring of power semiconductors that can be applied during operation with low computational effort.