Dependable Computing - EDDC-3
Third European Dependable Computing Conference, Prague, Czech Republic, September 15-17, 1999, Proceedings
Published on 1. September 1999
Book
Paperback/Softback
XVIII, 462 pages
978-3-540-66483-3 (ISBN)
Description
The idea of creating the European Dependable Computing Conference (EDCC) was born at the moment when the Iron Curtain fell. A group of enthusiasts, who were pre viously involved in research and teaching in the ?eld of fault tolerant computing in different European countries, agreed that there is no longer any point in keeping pre viously independent activities apart and created a steering committee which took the responsibility for preparing the EDCC calendar and appointing the chairs for the in dividual conferences. There is no single European or global professional organization that took over the responsibility for this conference, but there are three national in terest groups that sent delegates to the steering committee and support its activities, especially by promoting the conference materials. As can be seen from these materi als, they are the SEE Working Group "Dependable Computing" (which is a successor organizationof AFCET)in France,theGI/ITG/GMATechnicalCommitteeonDepend ability and Fault Tolerance in Germany, and the AICA Working Group "Dependability of Computer Systems" in Italy. In addition, committees of several global professional organizations, such as IEEE and IFIP, support this conference. Prague has been selected as a conference venue for several reasons. It is an easily accessible location that may attract many visitors by its beauty and that has a tradition in organizing international events of this kind (one of the last FTSD conferences took place here).
More details
Series
Edition
1999 ed.
Language
English
Place of publication
Berlin
Germany
Publishing group
Springer Berlin
Target group
Professional and scholarly
Professional/practitioner
Illustrations
XVIII, 462 p.
Dimensions
Height: 235 mm
Width: 155 mm
Thickness: 27 mm
Weight
727 gr
ISBN-13
978-3-540-66483-3 (9783540664833)
DOI
10.1007/3-540-48254-7
Schweitzer Classification
Other editions
Additional editions
Jan Hlavicka | Erik Maehle | Andras Pataricza
Dependable Computing - EDDC-3
Third European Dependable Computing Conference, Prague, Czech Republic, September 15-17, 1999, Proceedings
E-Book
06/2003
Springer
€53.49
Available for download
Content
Keynote Speech.- Reliable and Secure Operation of Smart Cards.- Session 1: Dependability Modelling.- Dependability Modelling and Sensitivity Analysis of Scheduled Maintenance Systems.- Evaluation of Video Communication over Packet Switching Networks.- Dependability Evaluation of a Distributed Shared Memory Multiprocessor System.- Session 2a: Panel.- Software Reliability Engineering Risk Management for the New Millenium.- Session 2b: Fast Abstracts.- List of Fast Abstracts.- Session 3: Protocols.- Muteness Failure Detectors: Specification and Implementation.- A Fault Tolerant Clock Synchronization Algorithm for Systems with Low-Precision Oscillators.- Avoiding Malicious Byzantine Faults by a New Signature Generation Technique.- An Experimental Evaluation of Coordinated Checkpointing in a Parallel Machine.- Session 4: Fault Injection 1.- MAFALDA: Microkernel Assessment by Fault Injection and Design Aid.- Assessing Error Detection Coverage by Simulated Fault Injection.- Considering Workload Input Variations in Error Coverage Estimation.- Session 5: Fault Injection 2.- Fault Injection into VHDL Models: Experimental Validation of a Fault-Tolerant Microcomputer System.- Can Software Implemented Fault-Injection be Used on Real-Time Systems?.- Session 6: Safety.- Integrated Safety in Flexible Manufacturing Systems.- A Method for Implementing a Safety Control System Based on Its Separation into Safety-Related and Non-Safety-Related Parts.- Session 7: Hardware Testing.- Design of Totally Self-Checking Code-Disjoint Synchronous Sequential Circuits.- Path Delay Fault Testing of a Class of Circuit-Switched Multistage Interconnection Networks.- Diagnostic Model and Diagnosis Algorithm of a SIMD Computer.- Session 8: Built-In Self-Test.- Pseudorandom, Weighted Random and Pseudoexhaustive Test Patterns Generated in Universal Cellular Automata.- A New LFSR with D and T Flip-Flops as an Effective Test Pattern Generator for VLSI Circuits.- Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.- Session 9: Networks and Distributed Systems.- Achieving Fault-Tolerant Ordered Broadcasts in CAN.- Directional Gossip: Gossip in a Wide Area Network.- Efficient Reliable Real-Time Group Communication for Wireless Local Area Networks.- Session 10: Software Testing and Self-Checking.- A Case Study in Statistical Testing of Reusable Concurrent Objects.- Fault-Detection by Result-Checking for the Eigenproblem1.- Concurrent Detection of Processor Control Errors by Hybrid Signature Monitoring.