Low-Power Design of Nanometer FPGAs
Architecture and EDA
Published on 3. November 2009
Book
Hardback
256 pages
978-0-12-374438-8 (ISBN)
Description
Low-Power Design of Nanometer FPGAs Architecture and EDA is an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques can be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign.
More details
Series
Language
English
Place of publication
San Francisco
United States
Publishing group
Elsevier Science & Technology
Target group
Professional and scholarly
Researchers, Circuit-Design Professionals, and EE/ECE Graduate Students concerned with low-power FPGA design. This includes designers at companies globally such as Xilinx, Altera, Actel, Cypress, Lattice Semiconductor, TI, Mentor Graphics, Cadence, Synopsis, Magma, Quicklogic, National Semiconductor, and Freescale.
Illustrations
138 illustrations
Dimensions
Height: 235 mm
Width: 191 mm
Weight
690 gr
ISBN-13
978-0-12-374438-8 (9780123744388)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions
E-Book
09/2009
Morgan Kaufmann
€80.95
Available for download
Persons
Hassan Hassan is currently a staff engineer in the timing and power group at Actel Corporation. He has authored/coauthored more than 20 papers in international journals and conferences. His research interests include integrated circuit design and design automation for deep submicron VLSI systems. He is also a member of the program committee for several IEEE conferences. Dr. Hassan received his Ph.D. in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 2008. Mohab Anis is a tenured Associate Professor at the Department of Electrical and Computer Engineering, University of Waterloo. During 2009, he was with the Electronics Engineering Department at the American University in Cairo. Dr. Anis received his Ph.D. in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 2003. Dr. Anis is an Associate Editor of the IEEE Transactions on Circuits and Systems - II, Microelectronics Journal, Journal of Circuits, Systems and Computers, ASP Journal of Low Power Electronics, and VLSI Design. He was awarded the 2009 Early Research Award, the 2004 Douglas R. Colton Medal for Research Excellence in recognition of excellence in research leading to new understanding and novel developments in Microsystems in Canada and the 2002 International Low-Power Design Contest.
Content
Chapter 1: FPGA Overview: Architecture and CADChapter 2: Power Dissipation in Modern FPGAsChapter 3: Power Estimation in FPGAsChapter 4: Dynamic Power Reduction Techniques in FPGAsChapter 5: Leakage Power Reduction in FPGAs Using MTCMOS TechniquesChapter 6: Leakage Power Reduction in FPGAs Through Input Pin Reordering