Architectures for High Dynamic Range CMOS Pipeline ADC conversion

This book addresses the study of high dynamic range pipeline A/D (Analogue-to-Digital) data converters architectures suitable for data communications. Two different circuit architectures are proposed, with a common goal of obtaining a high dynamic range characteristic. The first architecture consists on a classical pipeline A/D converter with an input dynamic range in the order of 80 dB. The second architecture consists of a pipeline A/D converter with non-linear input-output transfer characteristics, of the logarithmic type, capable of reaching the same dynamic range of 80 dB. New architectures are developed based on their linear counterparts, where the linear signal operations was replaced by their equivalents in the logarithmic domain. Digital error correction and calibration techniques, traditionally used in linear converters, are extended to the logarithmic case. A method to analyze errors in the class of logarithmic converters is also presented. Finally, the design and experimental characterization of two integrated circuits, one for each type of the developed architectures, are presented to assess the practical feasibility of the proposed solutions.