
Introduction to Evolvable Hardware
A Practical Guide for Designing Self-Adaptive Systems
Wiley (Publisher)
1st Edition
Published on 1. November 2006
Book
Hardback
208 pages
978-0-471-71977-9 (ISBN)
Description
THE FIRST UNIFIED GUIDE TO EVOLVABLE HARDWARE FOR THE PRACTITIONER
Evolvable hardware (EHW) is an exciting new field that brings together reconfigurable hardware, artificial intelligence, and fault tolerance in order to design autonomous systems that can self-adapt to compensate for failures or unanticipated changes in their operational environments. Demonstrating a high degree of reliabilityin extreme environments, these systems are finding exciting new applications in the military and space exploration fields.
Introduction to Evolvable Hardware: A Practical Guide for Designing Self-Adaptive Systems provides a highly practical introduction for engineers, designers, andmanagers involved in the development of adaptive, high-reliability systems, while at the same time introducing EHW concepts to new researchers in a structured way.
The authors cover the fundamentals of simulated evolution and provide an overview ofreconfigurable devices. Real-world digital and analog examples illustrate the power andversatility of EHW.
Special emphasis is placed on:
* Fault-tolerant applications
* System integration concepts
* Real-time design issues
An ideal resource for anyone interested in applied rather than theoretical research in this growing field, the book unifies the existing literature, which has, until now, only been available in journal articles and conference proceedings, and presents it in such a way that readers may begin applying it to their own research and design projects in a relatively short time.
Reviews / Votes
"The authors are to be congratulated on a particularly attractive set of well-organized subjects describing state-of-the-art research in the evolvable hardware domain." (Genetic Programming and Evolvable Machines, September 2008) "The authors should be congratulated on a particularly attractive set of well-organized subjects describing state-of-the-art research in the evolvable hardware domain." (Genet Program Evolvable Machine, February 2008) "The book is eminently readable...a good starting place." (Computing Reviews.com, September 13, 2007)More details
Series
Edition
1., Auflage
Language
English
Place of publication
New York
United States
Target group
Professional and scholarly
Illustrations
illustrations
Dimensions
Height: 23.6 cm
Width: 16.3 cm
Thickness: 18 mm
Weight
467 gr
ISBN-13
978-0-471-71977-9 (9780471719779)
Schweitzer Classification
Persons
GARRISON W. GREENWOOD, PhD, is an Associate Professor of Electrical and Computer Engineering at Portland State University. With nearly twenty years of industry experience, he is a Senior Member of the IEEE and the past chairman of the IEEE Computational Intelligence Society Technical Committee on Evolutionary Computation. He has been Associate Editor for IEEE Transactions on Evolutionary Computation since 2000.
ANDREW M. TYRRELL, PhD, is Professor and Chair of Digital Electronics in the Department of Electronics at the University of York, UK. He is a Senior Member of the IEEE, a Fellow of the IEE, Chairman of the IEEE Working Group on Evolvable Hardware, and Associate Editor of IEEE Transactions on Evolutionary Computation.
Content
PREFACE.
ACKNOWLEDGMENTS.
ACRONYMS.
1 INTRODUCTION.
1.1 Characteristics of Evolvable Circuits and Systems.
1.2 Why Evolvable Hardware Is Good (and Bad!).
1.3 Technology.
1.4 Evolvable Hardware vs. Evolved Hardware.
1.5 Intrinsic vs. Extrinsic Evolution.
1.6 Online vs. Offline Evolution.
1.7 Evolvable Hardware Applications.
References.
2 FUNDAMENTALS OF EVOLUTIONARY COMPUTATION.
2.1 What Is an EA?
2.2 Components of an EA.
2.2.1 Representation.
2.2.2 Variation.
2.2.3 Evaluation.
2.2.4 Selection.
2.2.5 Population.
2.2.6 Termination Criteria.
2.3 Getting the EA to Work.
2.4 Which EA Is Best?
References.
3 RECONFIGURABLE DIGITAL DEVICES.
3.1 Basic Architectures.
3.1.1 Programmable Logic Devices.
3.1.2 Field Programmable Gate Array.
3.2 Using Reconfigurable Hardware.
3.2.1 Design Phase.
3.2.2 Execution Phase.
3.3 Experimental Results.
3.4 Functional Overview of the POEtic Architecture.
3.4.1 Organic Subsystem.
3.4.2 Description of the Molecules.
3.4.3 Description of the Routing Layer.
3.4.4 Dynamic Routing.
3.5 Remarks.
References.
4 RECONFIGURABLE ANALOG DEVICES.
4.1 Basic Architectures.
4.2 Transistor Arrays.
4.2.1 The NASA FTPA.
4.2.2 The Heidelberg FPTA.
4.3 Analog Arrays.
4.4 Remarks.
References.
5 PUTTING EVOLVABLE HARDWARE TO USE.
5.1 Synthesis vs. Adaption.
5.2 Designing Self-Adaptive Systems.
5.2.1 Fault Tolerant Systems.
5.2.2 Real-Time Systems.
5.3 Creating Fault Tolerant Systems Using EHW.
5.4 Why Intrinsic Reconfiguration for Online Systems?
5.5 Quantifying Intrinsic Reconfiguration Time.
5.6 Putting Theory Into Practice.
5.6.1 Minimizing Risk With Anticipated Faults.
5.6.2 Minimizing Risk With Unanticipated Faults.
5.6.3 Suggested Practices.
5.7 Examples of EHW-Based Fault Recovery.
5.7.1 Population vs. Fitness-Based Designs.
5.7.2 EHW Compensators.
5.7.3 Robot Control.
5.7.4 The POEtic Project.
5.7.5 Embryo Development.
5.8 Remarks.
References.
6 FUTURE WORK.
6.1 Circuit Synthesis Topics.
6.1.1 Digital Design.
6.1.2 Analog Design.
6.2 Circuit Adaption Topics.
References.
INDEX.
ABOUT THE AUTHORS.