Low-Energy FPGAs - Architecture and Design
Architecture and Design
Published on 30. June 2001
Book
Hardback
X, 182 pages
978-0-7923-7428-2 (ISBN)
Description
Low-Energy FPGAs: Architecture and Design
is a primary resource for both researchers and practicing engineers in the field of digital circuit design.
The book addresses the energy consumption of Field-Programmable Gate Arrays (FPGAs). FPGAs are becoming popular as embedded components in computing platforms. The programmability of the FPGA can be used to customize implementations of functions on an application basis. This leads to performance gains, and enables reuse of expensive silicon.
Chapter 1 provides an overview of digital circuit design and FPGAs. Chapter 2 looks at the implication of deep-submicron technology onFPGA power dissipation. Chapter 3 describes the exploration environment to guide and evaluate design decisions. Chapter 4 discusses the architectural optimization process to evaluate the trade-offs between the flexibility of the architecture, and the effect on the performance metrics. Chapter 5 reviews different circuit techniques to reduce the performance overhead of some of the dominant components. Chapter 6 shows methods to configure FPGAs to minimize the programming overhead. Chapter 7 addresses the physical realization of some of the critical components and the final implementation of a specific low-energy FPGA. Chapter 8 compares the prototype array to an equivalent commercial architecture.
The book addresses the energy consumption of Field-Programmable Gate Arrays (FPGAs). FPGAs are becoming popular as embedded components in computing platforms. The programmability of the FPGA can be used to customize implementations of functions on an application basis. This leads to performance gains, and enables reuse of expensive silicon.
Chapter 1 provides an overview of digital circuit design and FPGAs. Chapter 2 looks at the implication of deep-submicron technology onFPGA power dissipation. Chapter 3 describes the exploration environment to guide and evaluate design decisions. Chapter 4 discusses the architectural optimization process to evaluate the trade-offs between the flexibility of the architecture, and the effect on the performance metrics. Chapter 5 reviews different circuit techniques to reduce the performance overhead of some of the dominant components. Chapter 6 shows methods to configure FPGAs to minimize the programming overhead. Chapter 7 addresses the physical realization of some of the critical components and the final implementation of a specific low-energy FPGA. Chapter 8 compares the prototype array to an equivalent commercial architecture.
More details
Series
Edition
2001 ed.
Language
English
Place of publication
New York
United States
Target group
Professional and scholarly
Research
Illustrations
X, 182 p.
Dimensions
Height: 241 mm
Width: 160 mm
Thickness: 15 mm
Weight
465 gr
ISBN-13
978-0-7923-7428-2 (9780792374282)
DOI
10.1007/978-1-4615-1421-3
Schweitzer Classification
Other editions
Additional editions
Varghese George | Jan M. Rabaey
Low-Energy FPGAs - Architecture and Design
Book
10/2012
Springer
€106.99
Shipment within 7-9 days
Content
1. Introduction.- 1 Introduction.- 2 FPGA.- 3 Interconnect Architecture.- 4 Logic Block Architecture.- 5 Programming Technology.- 6 Computation Model.- 7 Fpga as a Performance Accelerator.- 8 Research Projects.- 9 FPGA and Energy Consumption.- 10 Conclusion.- 2. Power Dissipation in FPGAS.- 1 Introduction.- 2 Technology and Power.- 3 Impact of Power Dissipation.- 4 Components of Power.- 5 Clock Energy.- 6 Conclusion.- 3. Exploration Environment.- 1 Introduction.- 2 Related Research.- 3 Evaluation Flow.- 4 Mapping.- 5 Architecture Representation.- 6 Placement.- 7 Routing.- 8 Extraction.- 9 Conclusion.- 4. Logic and Interconnect Architecture.- 1 Introduction.- 2 Related Research.- 3 Energy-Delay Components.- 4 Architectural Components.- 5 Logic Block.- 6 Goal of Interconnect Optimization.- 7 Interconnect Architecture.- 8 Conclusion.- 5. Circuit Techniques.- 1 Introduction.- 2 Related Work.- 3 Energy-Delay Design Space.- 4 Low-Swing Signaling.- 5 Low-Swing Circuit.- 6 Clock Distribution.- 7 Conclusion.- 6. Configuration Energy.- 1 Introduction.- 2 Configuration Cost.- 3 Configuration Techniques.- 4 Shift Register Versus Random Access.- 5 Configuration Energy Components.- 6 Methods to Reduce Configuration Energy.- 7 Conclusion.- 7. Hardware Implementation.- 1 Introduction.- 2 Logic Block.- 3 Interconnect.- 4 Tile Layout.- 5 Configuration Architecture.- 6 Final Layout.- 7 Fpga as an Embedded Unit.- 8 Conclusion.- 8. Results.- 1 Introduction.- 2 Measurement Setup.- 3 Measurement Strategy.- 4 Measured Data.- 5 Conclusion.- 9. Conclusion.- 1 FPGA: The Evolution.- 2 Energy Efficiency.- 3 This Work.- 4 Looking Ahead.