Principles of Digital Design
International Edition
Published on 9. October 1996
Book
Paperback/Softback
447 pages
978-0-13-242397-7 (ISBN)
Description
Appropriate for introductory courses in digital design, computer design, computer design and computer architecture in computer engineering and computer science curricula.
This text is designed to facilitate a thorough understanding of the fundamental principles of design without requiring readers to memorize an excess of confusing technological details. It integrates fundamentals with state-of-the-art techniques in computer design to demonstrate the complete design process, from specification to manufacturing.
This text is designed to facilitate a thorough understanding of the fundamental principles of design without requiring readers to memorize an excess of confusing technological details. It integrates fundamentals with state-of-the-art techniques in computer design to demonstrate the complete design process, from specification to manufacturing.
More details
Language
English
Place of publication
United States
Publishing group
Pearson Education (US)
Target group
Professional and scholarly
Dimensions
Height: 234 mm
Width: 205 mm
Thickness: 18 mm
Weight
754 gr
ISBN-13
978-0-13-242397-7 (9780132423977)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Previous edition
Book
09/1996
Pearson
€194.35
Article exhausted; check for reprint
Content
(NOTE: Each chapter ends with a summary, problems and further readings.)
1. Introduction.
Design representation. Levels of abstraction. Design process. CAD tools. Typical design process. Road map.
2. Data Types and Representations.
Positional number systems. Octal and hexadecimal numbers. Number system conversions. Addition and subtraction of binary numbers. Representation of negative numbers. Two's-complement addition and subtraction. Binary ultiplication. Binary division. Floating-point number representation. Binary codes for decimal numbers. Character codes. Codes for error detection and correction. Hamming codes.
3. Boolean Algebra and Logic Design.
Algebraic properties. Axiomatic definition of boolean algebra. Basic theorems of boolean algebra. Boolean functions. Canonical forms. Standard forms. Digital logic gates. Extension to multiple inputs and multiple operators. Gate implementations. VLSI technology.
4. Simplification of Boolean Functions.
The map representation. The map method of simplification. Don't-care conditions. The tabulation method. Technology mapping for gate arrays. Technology mapping for custom libraries. Hazard-free design.
5. Combinatorial Components.
Carry-ripple adders. Carry-look-ahead adders. Adders/subtractors. Logic unit. Arithmetic-Logic Unit. Decoders. Selectors. Buses. Priority encoders. Magnitude comparators. Shifters and rotators. Read-Only memories. Programmable logic arrays.
6. Sequential Logic.
SR-latch. Gated SR-latch. Gated D-latch. Flip-flops. Flip-flop types. Analysis of sequential logic. Finite-state-machine model. Synthesis of sequential logic. FSM model capture. State minimization. State encoding. Choice of memory elements. Optimization and timing.
7. Storage Components.
Registers. Shift registers. Counters. BCD counter. Asynchronous counter. Register files. Random-access memories (RAMs). Push-down stacks. Firs- in-first-out queue. Simple datapaths. General datapaths. Control unit design.
8. Register-Transfer Design.
Design model. FSMD definition. Algorithmic-state-machine charts. Synthesis from ASM charts. Register sharing (variable merging). Functional unit sharing (operator sharing). Bus sharing (connection merging). Register merging. Chaining and multicycling. Functional unit pipelining. ASM pipelining. Control- pipelining. Scheduling.
9. Processor Design.
Instruction sets. Addressing modes. Processor design. Instruction set design. Processor design. Reduced instruction set. RISC Design. Data forwarding. Branch prediction.
1. Introduction.
Design representation. Levels of abstraction. Design process. CAD tools. Typical design process. Road map.
2. Data Types and Representations.
Positional number systems. Octal and hexadecimal numbers. Number system conversions. Addition and subtraction of binary numbers. Representation of negative numbers. Two's-complement addition and subtraction. Binary ultiplication. Binary division. Floating-point number representation. Binary codes for decimal numbers. Character codes. Codes for error detection and correction. Hamming codes.
3. Boolean Algebra and Logic Design.
Algebraic properties. Axiomatic definition of boolean algebra. Basic theorems of boolean algebra. Boolean functions. Canonical forms. Standard forms. Digital logic gates. Extension to multiple inputs and multiple operators. Gate implementations. VLSI technology.
4. Simplification of Boolean Functions.
The map representation. The map method of simplification. Don't-care conditions. The tabulation method. Technology mapping for gate arrays. Technology mapping for custom libraries. Hazard-free design.
5. Combinatorial Components.
Carry-ripple adders. Carry-look-ahead adders. Adders/subtractors. Logic unit. Arithmetic-Logic Unit. Decoders. Selectors. Buses. Priority encoders. Magnitude comparators. Shifters and rotators. Read-Only memories. Programmable logic arrays.
6. Sequential Logic.
SR-latch. Gated SR-latch. Gated D-latch. Flip-flops. Flip-flop types. Analysis of sequential logic. Finite-state-machine model. Synthesis of sequential logic. FSM model capture. State minimization. State encoding. Choice of memory elements. Optimization and timing.
7. Storage Components.
Registers. Shift registers. Counters. BCD counter. Asynchronous counter. Register files. Random-access memories (RAMs). Push-down stacks. Firs- in-first-out queue. Simple datapaths. General datapaths. Control unit design.
8. Register-Transfer Design.
Design model. FSMD definition. Algorithmic-state-machine charts. Synthesis from ASM charts. Register sharing (variable merging). Functional unit sharing (operator sharing). Bus sharing (connection merging). Register merging. Chaining and multicycling. Functional unit pipelining. ASM pipelining. Control- pipelining. Scheduling.
9. Processor Design.
Instruction sets. Addressing modes. Processor design. Instruction set design. Processor design. Reduced instruction set. RISC Design. Data forwarding. Branch prediction.