Multiprocessor Computer Architectures
Elsevier (Publisher)
Published in June 1990
Book
Hardback
262 pages
978-0-444-88215-8 (ISBN)
Description
For over forty years, most of the world has designed its computers after a single fashion. This style, which has come to be known as the von Neumann model after one of its originators, is showing increasing signs of being inadequately powerful for future needs. Efforts to discover alternative models, for so long a trickle, are at least becoming a flood. This book reports on the current status of a number of these efforts. This book is addressed to two main audiences. First, it is aimed at the reader who is new to the world of non-von Neumann computers, either in the area of design or that of application. By taking the form of a catalogue of projects bound in a single volume, it serves as a particularly convenient introductory text. Thus, it can be used to obtain a feel for the problems which designers are presently confronting and the solutions which they are developing. Indeed, the newcomer to the field, with the benefit of a fresh and unbiased viewpoint, may be in the best position to read through these collected reports and to identify some common point which has hitherto gone unnoticed or unexploited.
For over forty years, most of the world has designed its computers after a single fashion. This style, which has come to be known as the von Neumann model after one of its originators, is showing increasing signs of being inadequately powerful for future needs. Efforts to discover alternative models, for so long a trickle, are at least becoming a flood. This book reports on the current status of a number of these efforts. This book is addressed to two main audiences. First, it is aimed at the reader who is new to the world of non-von Neumann computers, either in the area of design or that of application. By taking the form of a catalogue of projects bound in a single volume, it serves as a particularly convenient introductory text. Thus, it can be used to obtain a feel for the problems which designers are presently confronting and the solutions which they are developing. Indeed, the newcomer to the field, with the benefit of a fresh and unbiased viewpoint, may be in the best position to read through these collected reports and to identify some common point which has hitherto gone unnoticed or unexploited.
For over forty years, most of the world has designed its computers after a single fashion. This style, which has come to be known as the von Neumann model after one of its originators, is showing increasing signs of being inadequately powerful for future needs. Efforts to discover alternative models, for so long a trickle, are at least becoming a flood. This book reports on the current status of a number of these efforts. This book is addressed to two main audiences. First, it is aimed at the reader who is new to the world of non-von Neumann computers, either in the area of design or that of application. By taking the form of a catalogue of projects bound in a single volume, it serves as a particularly convenient introductory text. Thus, it can be used to obtain a feel for the problems which designers are presently confronting and the solutions which they are developing. Indeed, the newcomer to the field, with the benefit of a fresh and unbiased viewpoint, may be in the best position to read through these collected reports and to identify some common point which has hitherto gone unnoticed or unexploited.
More details
Language
English
Place of publication
Oxford
United Kingdom
Publishing group
Elsevier Science & Technology
Target group
College/higher education
Professional and scholarly
Illustrations
Illustrations
Dimensions
Height: 230 mm
ISBN-13
978-0-444-88215-8 (9780444882158)
Copyright in bibliographic data is held by Nielsen Book Services Limited or its licensors: all rights reserved.
Schweitzer Classification
Content
1. Categorising Parallel Computer Architectures (M.J. Shute). 2. The Experimental ALICE Machine (M.J. Reeve and S. Wright). 3. The FLAGSHIP Parallel Machine (P. Watson). 4. Experiments with the ZAPP Virtual Tree Architecture (D.L. McBurney and M.R. Sleep). 5. GRIP - A High-Performance Architecture for Parallel Graph Reduction (S.L. Peyton Jones, C. Clack, J. Salkild and M. Hardie). 6. COBWEB-2 A Declarative Language Multiprocessor (P. Anderson, D. Bolton, C. Hankin, P. Kelly and P. Osmon). 7. The MANCHESTER DATAFLOW Project (C. Kirkham). 8. The AMT DAP 500 System (A.G. Bale, J. Litt and C.J. Pavelin). 9. A Bit-Serial Systolic Back-Projection Engine (R. Bayford). 10. The CLIP7 Programme (T.J. Fountain). 11. Reconfigurable Transputer Processor Architectures (D.A. Nicole). 12. Conclusions (T.J. Fountain). Index.