Spacer Engineered FinFET Architectures
High-Performance Digital Circuit Applications
1st Edition
Published on 6. June 2017
Book
Hardback
154 pages
978-1-4987-8359-0 (ISBN)
Description
This book focusses on the spacer engineering aspects of novel MOS-based device-circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
More details
Language
English
Place of publication
Bosa Roca
United States
Publishing group
Taylor & Francis Inc
Target group
College/higher education
Illustrations
39 farbige Abbildungen, 14 s/w Photographien bzw. Rasterbilder, 49 s/w Abbildungen, 3 s/w Tabellen
3 Tables, black and white; 14 Halftones, black and white; 39 Illustrations, color; 49 Illustrations, black and white
Dimensions
Height: 234 mm
Width: 156 mm
Weight
378 gr
ISBN-13
978-1-4987-8359-0 (9781498783590)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions
Sudeb Dasgupta | Brajesh Kumar Kaushik | Pankaj Kumar Pal
Spacer Engineered FinFET Architectures
High-Performance Digital Circuit Applications
Book
06/2020
1st Edition
CRC Press
€64.36
Shipment within 15-20 days
Sudeb Dasgupta | Brajesh Kumar Kaushik | Pankaj Kumar Pal
Spacer Engineered FinFET Architectures
High-Performance Digital Circuit Applications
E-Book
06/2017
CRC Press
€68.49
Available for download
Sudeb Dasgupta | Brajesh Kumar Kaushik | Pankaj Kumar Pal
Spacer Engineered FinFET Architectures
High-Performance Digital Circuit Applications
E-Book
06/2017
1st Edition
CRC Press
€68.49
Available for download
Persons
Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal
Content
Preface
About the Authors
Chapter 1 ? Introduction to Nanoelectronics
Chapter 2 ? Tri-Gate FinFET Technology and Its Advancement
Chapter 3 ? Dual-k Spacer Device Architecture and Its Electrostatics
Chapter 4 ? Capacitive Analysis and Dual-k FinFET-Based Digital Circuit Design
Chapter 5 ? Design Metric Improvement of a Dual-k-Based SRAM Cell
Chapter 6 ? Statistical Variability and Sensitivity Analysis
INDEX
About the Authors
Chapter 1 ? Introduction to Nanoelectronics
Chapter 2 ? Tri-Gate FinFET Technology and Its Advancement
Chapter 3 ? Dual-k Spacer Device Architecture and Its Electrostatics
Chapter 4 ? Capacitive Analysis and Dual-k FinFET-Based Digital Circuit Design
Chapter 5 ? Design Metric Improvement of a Dual-k-Based SRAM Cell
Chapter 6 ? Statistical Variability and Sensitivity Analysis
INDEX