UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
Published on 9. November 2014
Book
Paperback/Softback
XVIII, 222 pages
978-1-4899-9570-4 (ISBN)
Description
This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs.
More details
Language
English
Place of publication
New York
United States
Target group
Professional and scholarly
Research
Illustrations
XVIII, 222 p.
Dimensions
Height: 235 mm
Width: 155 mm
Thickness: 14 mm
Weight
371 gr
ISBN-13
978-1-4899-9570-4 (9781489995704)
DOI
10.1007/978-1-4614-2410-9
Schweitzer Classification
Other editions
Additional editions
Martin Danek | Leos Kafka | Lukás Kohout
UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
Book
10/2012
1st Edition
Springer
€106.99
Shipment within 15-20 days
Content
Introduction.- The LEON3 Processor.- Microthreaded Extensions.- The Basic UTLEON3 Architecture.- UTLEON3 Programming by Example.- UTLEON3 Implementation Details.- Execution Effieciency of the Microthread Pipeline.- Hardware Families of Threads.- I/O and Interrupt Handling in the Microthread Mode.- The IU3 Pipeline.- Excerpts from the LEON3 Instruction Set.- Relevant LEON3 Registers and Address Space Identifiers.- Scheduler Example.- Used Resources.- Tutorial.