
Essentials of Computer Architecture
Douglas Comer(Author)
Chapman & Hall/CRC (Publisher)
3rd Edition
Will be published approx. on 20. July 2026
Book
Paperback/Softback
517 pages
978-1-032-72720-2 (ISBN)
Description
This easy-to-read textbook provides an introduction to computer architecture, focusing on the essential aspects of hardware that programmers need to know. Written from a programmer's point of view, Essentials of Computer Architecture, Third Edition, covers the three key aspects of architecture: processors, physical and virtual memories, and input-output (I/O) systems.
This third edition is updated in view of advances in the field. Most students only have experience with high-level programming languages, and almost no experience tinkering with electronics and hardware. As such, this text is revised to follow a top-down approach, moving from discussions on how a compiler transforms a source program into binary code and data, to explanations of how a computer represents data and code in binary.
Additional chapters cover parallelism and data pipelining, assessing the performance of computer systems, and the important topic of power and energy consumption. Exclusive to this third edition, a new chapter explains multicore processors and how coherence hardware provides a consistent view of the values in memory even though each core has its own cache.
Suitable for a one-semester undergraduate course, this clear, concise, and easy-to-read textbook offers an ideal introduction to computer architecture for students studying computer programming.
This third edition is updated in view of advances in the field. Most students only have experience with high-level programming languages, and almost no experience tinkering with electronics and hardware. As such, this text is revised to follow a top-down approach, moving from discussions on how a compiler transforms a source program into binary code and data, to explanations of how a computer represents data and code in binary.
Additional chapters cover parallelism and data pipelining, assessing the performance of computer systems, and the important topic of power and energy consumption. Exclusive to this third edition, a new chapter explains multicore processors and how coherence hardware provides a consistent view of the values in memory even though each core has its own cache.
Suitable for a one-semester undergraduate course, this clear, concise, and easy-to-read textbook offers an ideal introduction to computer architecture for students studying computer programming.
More details
Edition
3rd edition
Language
English
Place of publication
United Kingdom
Publishing group
Taylor & Francis Ltd
Target group
College/higher education
Undergraduate Core
Illustrations
239 farbige Zeichnungen, 239 farbige Abbildungen
239 Line drawings, color; 239 Illustrations, color
Dimensions
Height: 228 mm
Width: 177 mm
ISBN-13
978-1-032-72720-2 (9781032727202)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions

Douglas Comer
Essentials of Computer Architecture
E-Book
05/2024
3rd Edition
Chapman and Hall
€115.99
Available for download

Douglas Comer
Essentials of Computer Architecture
Book
05/2024
3rd Edition
Chapman & Hall/CRC
€122.00
Shipment within 10-20 days

Douglas Comer
Essentials of Computer Architecture
E-Book
05/2024
3rd Edition
Chapman and Hall
€115.99
Available for download
Previous edition

Douglas Comer
Essentials of Computer Architecture
Book
06/2020
2nd Edition
Chapman & Hall/CRC
€55.79
Article exhausted; check for reprint
Person
Douglas Comer is a Distinguished Professor of Computer Science at Purdue University with a courtesy appointment in Purdue's Electrical and Computer Engineering Department. He has created and taught courses for undergraduate students, graduate students, engineers, and nontechnical audiences, on a variety of topics, including computer architecture, operating systems, computer networks, the Internet, digital literacy, and cloud computing. Comer has authored seventeen textbooks. His books have been translated into sixteen languages, and widely used in industry as well as academia. In addition to teaching at Purdue, Comer continues to lecture at companies and industry conferences. He is the recipient of multiple teaching awards and a Fellow of the ACM. An internationally recognized authority on computer networking, the Internet and the TCP/IP protocols, he is a member of the Internet Hall of Fame.
Content
Preface
Chapter 1 Introduction and Overview
Chapter 2 Program Interpretation and Transformation
Chapter 3 Data and Program Representation
Chapter 4 A High-Level Overview of Processors
Chapter 5 Instruction Stes and Operands
Chapter 6 Operand Addressing and Operand Types
Chapter 7 Assembly Languages and Programming Paradigm
Chapter 8 Main Memory and Memory Addressing
Chapter 9 Virtual Memory Technologies and Virtual Addressing
Chapter 10 Caches and Caching
Chapter 11 Storage: File Systems, Blocks and SSDs
Chapter 12 A Programmer's View of Devices, I/O, and Buffering
Chapter 13 Buses and Bus Architectures
Chapter 14 Programming Devices and Interrupt-Driven I/O
Chapter 15 Data Paths and Instruction Execution
Chapter 16 CPUs: Micrcode, Protection, and Processor Modes
Chapter 17 Parallelism
Chapter 18 Data Pipelining
Chapter 19 Assessing Performance
Chapter 20 Multicore Processors
Chapter 21 Power and Energy
Chapter 22 Building Blocks: Transistors, Gates and Clocks
Chapter 23 Hardware Modularity
Appendix 1 Rules for Boolean Algebra Simplification
Appendix 2 A Quick Introduction to x86 Assembly Language
Appendix 3 ARM Register Definitions and Calling Sequence
Appendix 4 Lab Exercises for a Computer Architecture Course
Chapter 1 Introduction and Overview
Chapter 2 Program Interpretation and Transformation
Chapter 3 Data and Program Representation
Chapter 4 A High-Level Overview of Processors
Chapter 5 Instruction Stes and Operands
Chapter 6 Operand Addressing and Operand Types
Chapter 7 Assembly Languages and Programming Paradigm
Chapter 8 Main Memory and Memory Addressing
Chapter 9 Virtual Memory Technologies and Virtual Addressing
Chapter 10 Caches and Caching
Chapter 11 Storage: File Systems, Blocks and SSDs
Chapter 12 A Programmer's View of Devices, I/O, and Buffering
Chapter 13 Buses and Bus Architectures
Chapter 14 Programming Devices and Interrupt-Driven I/O
Chapter 15 Data Paths and Instruction Execution
Chapter 16 CPUs: Micrcode, Protection, and Processor Modes
Chapter 17 Parallelism
Chapter 18 Data Pipelining
Chapter 19 Assessing Performance
Chapter 20 Multicore Processors
Chapter 21 Power and Energy
Chapter 22 Building Blocks: Transistors, Gates and Clocks
Chapter 23 Hardware Modularity
Appendix 1 Rules for Boolean Algebra Simplification
Appendix 2 A Quick Introduction to x86 Assembly Language
Appendix 3 ARM Register Definitions and Calling Sequence
Appendix 4 Lab Exercises for a Computer Architecture Course