
Customizable Computing
Morgan and Claypool Life Sciences (Publisher)
Published on 30. June 2015
Book
Paperback/Softback
118 pages
978-1-62705-767-7 (ISBN)
Description
Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific integrated circuits (ASICs) motivates the exploration of customizable architectures, where one can adapt the architecture to the workload. In this Synthesis lecture, we present an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, we also highlight and illustrate some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. We hope that this work captures the state-of-the-art research and development on customizable architectures and serves as a useful reference basis for further research, design, and implementation for large-scale deployment in future computing systems.
More details
Series
Language
English
Place of publication
San Rafael, CA
United States
Publishing group
Morgan & Claypool Publishers
Dimensions
Height: 235 mm
Width: 187 mm
Weight
250 gr
ISBN-13
978-1-62705-767-7 (9781627057677)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Content
- Acknowledgments
- Introduction
- Road Map
- Customization of Cores
- Loosely Coupled Compute Engines
- On-Chip Memory Customization
- Interconnect Customization
- Concluding Remarks
- Bibliography
- Authors' Biographies
- Introduction
- Road Map
- Customization of Cores
- Loosely Coupled Compute Engines
- On-Chip Memory Customization
- Interconnect Customization
- Concluding Remarks
- Bibliography
- Authors' Biographies