AI for Computer Architecture

Lizhong Chen is an Associate Professor in the School of Electrical Engineering and Computer Science at Oregon State University. He received his Ph.D. in Computer Engineering and M.S. in Electrical Engineering from the University of Southern California in 2014 and 2011, respectively, and B.S. in Electrical Engineering from Zhejiang University in 2009. His research interests are in the board area of computer architecture, interconnection networks, GPUs, machine learning, hardware accelerators, and emerging IoT technologies. Dr. Chen is the recipient of National Science Foundation (NSF) CAREER Award, several Best Paper Awards/Nominations at major architecture conferences, Chu Kochen Award (the highest honor from Zhejiang University), and an inductee of the HPCA Hall of Fame. He is also the founder and organizer of the Annual International Workshop on AI-assisted Design for Architecture (AIDArc), held in conjunction with ISCA. Dr. Chen is currently serving on the editorial board of IEEE Transactions on Computers (TC) and, in the past, has served as a program committee member in major computer architecture conferences (e.g., ISCA, HPCA, MICRO, DAC, ICS, IPDPS, IISWC), reviewer for several IEEE and ACM journals (e.g., TC, TPDS, TVLSI, TCAD, TACO), and panelist of multiple NSF panels related to computer systems architecture. He is a Senior Member of IEEE and ACM.

Drew Penney is currently a Ph.D. student at Oregon State University and is a member of the System Technology and Architecture Research (STAR) Lab, directed by Dr. Lizhong Chen. At the STAR Lab, Drew explores novel machine learning applications to diverse architectural designs. He received his Bachelor's degree in Electrical and Computer Engineering (Summa Cum Laude) from Oregon State University and was a Dean's Scholar. He has published several papers on AI in computer architecture, was an invited guest speaker at a workshop on AI-assisted Design for Architecture (AIDArc), and received the Best Paper Runner-up Award in HPCA 2020 for his work on deep reinforcement learning in network-on-chip design.

Daniel Jiménez is a Professor in the Department of Computer Science and Engineering at Texas A&M University. He was previously Assistant and later Associate Professor in the Department of Computer Science at Rutgers University, and Professor and Chair of the Department of Computer Science at UT San Antonio. Dr. Jiménez received his Ph.D. in Computer Sciences from UT Austin in 2002. He is interested in characterizing and exploiting the predictability of programs to improve microarchitecture. He pioneered the development of neural-inspired branch predictors, which have been implemented in microprocessors from AMD, Oracle, and Samsung. Dr. Jiménez designed the neural branch predictor for the Samsung Exynos M1 which is used in the popular Samsung Galaxy S7. He is a Senior Member of the IEEE, an ACM Distinguished Scientist, an NSF CAREER award winner, and member of the HPCA and MICRO halls of fame. He was the General Chair of IEEE HPCA in 2011, Program Chair for IEEE HPCA in 2017, and Chair of IEEE Technical Committee on Computer Architecture (TCCA) in 2018.