
High Performance Complex Number Multiplier
Design and Analysis
LAP Lambert Academic Publishing
Published on 22. May 2013
Book
Paperback/Softback
92 pages
978-3-659-38044-0 (ISBN)
Description
HIGH PERFORMANCE COMPLEX NUMBER MULTIPLIER USING BOOTH-WALLACE ALGORITHM: This book describes the methods required to implement a newly design approach for a high speed and high performance parallel complex number multiplier. The system is capable for processing a multiplication of 16x16-bit signed numbers. The complex number multiplier introduced proven that by reducing the number of partial product rows together with merging two different design techniques as well as the selection of fast adder are superior to produce high speed, high performance and reduce area system.
More details
Language
English
Product notice
Paperback (trade)
Unsewn / adhesive bound
Dimensions
Height: 220 mm
Width: 150 mm
Thickness: 7 mm
Weight
155 gr
ISBN-13
978-3-659-38044-0 (9783659380440)
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Schweitzer Classification
Persons
Dr. Rizalafande Che Ismail obtained his PhD degree from Newcastle University, United Kingdom in Microelectronics System Design in 2012. He is currently a senior lecturer in the School of Microelectronic Engineering, Universiti Malaysia Perlis, Malaysia. He is engaged in designing of low power and high speed architecture for digital system design.