Advanced Digital Systems Experiments and Concepts With CPLDs
Published on 1. June 2004
Book
Mixed media product
332 pages
978-1-4018-6636-5 (ISBN)
Description
This new book presents digital concepts incrementally and is a refreshing change from the texts that present principles too quickly and all at the same time. A perfect complement to recent technological advances resulting in affordable CPLD simulators, this book offers users valuable and applied exposure to CPLD and VHDL environments. Care has been taken to ensure that digital concepts are presented in a systematic and progressive format so that readers can gain confidence before being introduced to more advanced topics. CPLD technology minimizes the wiring and engineering complexities so that users are freed up to design and test advanced digital systems in shorter periods of time.
Reviews / Votes
Lab 1: Logic Gate Systems. Lab 2: Older Generation Logic Gate Systems Versus CPLD Systems. Lab 3: Flip Flop, Shift Registers, and Switch Bounce. Lab 4: Serial and Parallel Data Transfer Systems. Lab 5: JK Flip Flop and Counter Fundamentals. Lab 6: Digital Display Decoder System. Lab 7: "1 of X" Decoder And Encoder Systems. Lab 8: Multiplexer and Demultiplexer Systems. Lab 9: Matrix Keypad System. Lab 10: Arithmetic Systems. Lab 11: Memory System Fundamentals. Lab 12: Liquid Crystal Displays (LCD). Appendix A: The Evolution Of ROM and RAM. Appendix B: VHDL Design Guide. Appendix C: FLEX Expansion Header Guide. Appendix D: Forms And Guides For The DMD Lab 11 Project. Appendix E: Summary Sheet for FLEX Designs: Using "Lab 1 as a guide". Appendix F: Altera Simulator Guide.More details
Edition
New edition
Language
English
Place of publication
Clifton Park
United States
Publishing group
Cengage Learning, Inc
Target group
College/higher education
Edition type
New edition
ISBN-13
978-1-4018-6636-5 (9781401866365)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Person
Mr. Chartrand holds a Bachelor of Science degree in electrical engineering from Queen's university in Kingston Ontario. He has been teaching digital courses for 20 years at Niagara College in Welland , Ontario. Mr. Chartrand has made industry contributions with various designs including interfacing an infrared camera to a PC, creating a digital circuit board used as a PC training system, and designing a control pendant for an air-filled medical bed. He also worked as a plant engineer for General Motors.
Content
Lab 1: Logic Gate Systems.Lab 2: Older Generation Logic Gate Systems Versus CPLD Systems.Lab 3: Flip Flop, Shift Registers, and Switch Bounce.Lab 4: Serial and Parallel Data Transfer Systems.Lab 5: JK Flip Flop and Counter Fundamentals.Lab 6: Digital Display Decoder System.Lab 7: "1 of X" Decoder And Encoder Systems.Lab 8: Multiplexer and Demultiplexer Systems.Lab 9: Matrix Keypad System.Lab 10: Arithmetic Systems.Lab 11: Memory System Fundamentals.Lab 12: Liquid Crystal Displays (LCD).Appendix A: The Evolution Of ROM and RAM.Appendix B: VHDL Design Guide.Appendix C: FLEX Expansion Header Guide.Appendix D: Forms And Guides For The DMD Lab 11 Project.Appendix E: Summary Sheet for FLEX Designs: Using "Lab 1 as a guide".Appendix F: Altera Simulator Guide.