Analog Integrated Circuit Design
2nd Edition
Published on 18. November 2011
Book
Hardback
816 pages
978-0-470-77010-8 (ISBN)
Description
The 2nd Edition of Analog Integrated Circuit Design focuses on more coverage about several types of circuits that have increased in importance in the past decade. Furthermore, the text is enhanced with material on CMOS IC device modeling, updated processing layout and expanded coverage to reflect technical innovations. CMOS devices and circuits have more influence in this edition as well as a reduced amount of text on BiCMOS and bipolar information. New chapters include topics on frequency response of analog ICs and basic theory of feedback amplifiers.
More details
Edition
2nd Revised edition
Language
English
Place of publication
Chichester
United Kingdom
Publishing group
John Wiley and Sons Ltd
Target group
College/higher education
Professional and scholarly
Edition type
Revised edition
Product notice
sewn/stitched
Paper over boards
Dimensions
Height: 256 mm
Width: 192 mm
Thickness: 2 mm
Weight
1339 gr
ISBN-13
978-0-470-77010-8 (9780470770108)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Previous edition
David Johns | Ken Martin
Analog Integrated Circuit Design
Book
11/1996
1st Edition
Wiley
€189.00
Article exhausted; check for reprint
Persons
Tony Chan Carusone completed the B.A.Sc. and Ph.D. degrees at the University of Toronto in 1997 and 2002 respectvely, during which tme he received the Governor-General's Silver Medal. Since 2001, he has been with the Department of Electrical and Computer Engineering at the University of Toronto where he is currently an Associate Professor. From 2002 to 2007 he held the Canada Research Chair in Integrated Systems and in 2008 was a visitng researcher at the University of Pavia. He is also an occasional consultant to industry, having worked for Snowbush Inc., Gennum Corp., and Intel Corp., all in the area of high-speed links. Tony was a co-author of the best student papers at both the 2007 and 2008 Custom Integrated Circuits Conference and the best paper at the 2005 Compound Semiconductor Integrated Circuits Symposium. He is an appointed member of the Administratve Commitee of the IEEE Solid-State Circuits Society, a member and past chair of the Analog Signal Processing Technical Commitee for the IEEE Circuits and Systems Society, and a past member and chair of the Wireline Communicatons subcommitee of the Custom Integrated Circuits Conference. He has served as a guest editor for both the IEEE Journal of Solid-State Circuits and the IEEE Transactons on Circuits and Systems I: Regular Papers, and served on the editorial board of the IEEE Transactons on Circuits and Systems II: Express Briefs from 2006 untl 2009 when he was Editor-in-Chief.
Content
CHAPTER 1 INTEGRATED CIRCUIT DEVICES AND MODELLING 1 1.1 Semiconductors and pn Junctions 1 1.2 MOS Transistors 14 1.3 Device Model Summary 38 1.4 Advanced MOS Modelling 42 1.5 SPICE Modelling Parameters 50 1.6 Passive Devices 54 1.7 Appendix 60 1.8 Key Points 68 1.9 References 69 1.10 Problems 69 Summary 70 Modelling Parameters 71 1.10.4 Section 1.6: Passive Devices 71 CHAPTER 2 PROCESSING AND LAYOUT 73 2.1 CMOS Processing 73 2.2 CMOS Layout and Design Rules 86 2.3 Variability 97 2.4 Analog Layout Considerations 104 2.5 Key Points 114 2.6 References 115 2.7 Problems 116 CHAPTER 3 BASIC CURRENT MIRRORS AND SINGLE-STAGE AMPLIFIERS 119 3.1 Simple CMOS Current Mirror 120 3.2 Common-Source Amplifier 122 3.3 Source-Follower or Common-Drain Amplifier 124 3.4 Common-Gate Amplifier 126 3.5 Source-Degenerated Current Mirrors 129 3.6 Cascode Current Mirrors 131 3.7 Cascode Gain Stage 137 3.8 MOS Differential Pair and Gain Stage 137 3.9 Key Points 140 3.10 References 141 3.11 Problems 141 CHAPTER 4 FREQUENCY RESPONSE OF ELECTRONIC CIRCUITS 146 4.1 Frequency Response of Linear Systems 146 4.2 Frequency Response of Elementary Transistor Circuits 167 4.3 Cascode Gain Stage 183 4.4 Source-Follower Amplifier 190 4.5 Differential Pair 196 4.6 Key Points 200 4.7 References 201 4.8 Problems 201 CHAPTER 5 FEEDBACK AMPLIFIERS 207 5.1 Ideal Model of Negative Feedback 207 5.2 Dynamic Response of Feedback Amplifiers 211 5.3 First- and Second-Order Feedback Systems 216 5.4 Common Feedback Amplifiers 224 5.5 Summary of Key Points 239 5.6 References 240 5.7 Problems 240 CHAPTER 6 BASIC OPAMP DESIGN AND COMPENSATION 246 6.1 Two-Stage CMOS Opamp 246 6.2 Opamp Compensation 258 6.3 Advanced Current Mirrors 265 6.4 Folded-Cascode Opamp 272 6.5 Current Mirror Opamp 279 6.6 Linear Settling Time Revisited 283 6.7 Fully Differential Opamps 285 6.8 Common-Mode Feedback Circuits 291 6.9 Summary of Key Points 295 6.10 References 296 6.11 Problems 297 CHAPTER 7 BIASING, REFERENCES, AND REGULATORS 305 7.1 Analog Integrated Circuit Biasing 305 7.2 Establishing Constant Transconductance 310 7.3 Establishing Constant Voltages and Currents 313 7.4 Voltage Regulation 324 7.5 Summary of Key Points 330 7.6 References 330 7.7 Problems 331 CHAPTER 8 BIPOLAR DEVICES AND CIRCUITS 334 8.1 Bipolar-Junction Transistors 334 8.4 Bipolar and BICMOS Processing 349 8.4.1 Bipolar Processing 349 8.5 Bipolar Current Mirrors and Gain Stages 352 8.6 Appendix 359 8.7 Summary of Key Points 362 8.8 References 363 8.9 Problems 363 CHAPTER 9 NOISE AND LINEARITY ANALYSIS AND MODELLING 367 9.1 Time-Domain Analysis 367 9.2 Frequency-Domain Analysis 371 9.3 Noise Models for Circuit Elements 381 9.3.8 Input-Referred Noise 388 9.4 Noise Analysis Examples 391 9.5 Dynamic Range Performance 401 9.6 Key Points 408 9.7 References 409 9.8 Problems 410 CHAPTER 10 COMPARATORS 417 10.1 Comparator Specifications 417 10.2 Using an Opamp for a Comparator 419 10.3 Charge-Injection Errors 422 10.4 Latched Comparators 430 10.5 Examples of CMOS and BiCMOS Comparators 435 10.6 Examples of Bipolar Comparators 441 10.7 Key Points 443 10.8 References 444 10.9 Problems 444 CHAPTER 11 SAMPLE-AND-HOLD AND TRANSLINEAR CIRCUITS 448 11.1 Performance of Sample-and-Hold Circuits 448 11.2 MOS Sample-and-Hold Basics 450 11.3 Examples of CMOS S/H Circuits 456 11.4 Bipolar and BiCMOS Sample and Holds 460 11.5 Translinear Gain Cell 464 11.6 Translinear Multiplier 466 11.7 Key Points 468 11.8 References 469 11.9 Problems 470 CHAPTER 12 CONTINUOUS-TIME FILTERS 473 12.1 Introduction to Continuous-Time Filters 473 12.2 Introduction to Gm-C Filters 475 12.3 Transconductors using Fixed Resistors 483 12.5 CMOS Transconductors Using Active Transistors 497 12.6 Bipolar Transconductors 504 12.7 BiCMOS Transconductors 511 12.8 Active RC and MOSFET-C Filters 514 12.9 Tuning Circuitry 522 12.10 Introduction to Complex Filters 530 12.11 Key Points 536 12.12 References 538 12.13 Problems 540 CHAPTER 13 DISCRETE-TIME SIGNALS 543 13.1 Overview of Some Signal Spectra 543 13.2 Laplace Transforms of Discrete-Time Signals 543 13.2.1 Spectra of Discrete-Time Signals 546 13.3 z-Transform 547 13.4 Downsampling and Upsampling 549 13.5 Discrete-Time Filters 551 13.6 Sample-and-Hold Response 558 13.7 Key Points 560 13.8 References 561 13.9 Problems 561 CHAPTER 14 SWITCHED-CAPACITOR CIRCUITS 563 14.1 Basic Building Blocks 563 14.2 Basic Operation and Analysis 566 14.3 Noise in Switched-Capacitor Circuits 576 14.4 First-Order Filters 578 14.5 Biquad Filters 583 14.6 Charge Injection 591 14.7 Switched-Capacitor Gain Circuits 594 14.8 Correlated Double-Sampling Techniques 599 14.9 Other Switched-Capacitor Circuits 600 14.10 Key Points 606 14.11 References 607 14.12 Problems 608 CHAPTER 15 DATA CONVERTER FUNDAMENTALS 612 15.1 Ideal D/A Converter 612 15.2 Ideal A/D Converter 614 15.3 Quantization Noise 615 15.3.1 Deterministic Approach 615 15.3.2 Stochastic Approach 616 15.4 Signed Codes 618 15.5 Performance Limitations 620 15.5.1 Resolution 620 15.5.2 Offset and Gain Error 621 15.5.3 Accuracy and Linearity 621 15.6 Key Points 626 15.7 References 626 15.8 Problems 626 CHAPTER 16 NYQUIST-RATE D/A CONVERTERS 603 16.1 Decoder-Based Converters 629 16.2 Binary-Scaled Converters 634 16.3 Thermometer-Code Converters 640 16.4 Hybrid Converters 646 16.5 Key Points 648 16.6 References 649 16.7 Problems 649 CHAPTER 17 NYQUIST-RATE A/D CONVERTERS 652 17.1 Integrating Converters 656 17.2 Successive-Approximation Converters 656 17.3 Algorithmic (or Cyclic) A/D Converter 668 17.4 Pipelined A/D Converters 671 17.5 Flash Converters 679 17.5.1 Issues in Designing Flash A/D Converters 681 17.6 Two-Step A/D Converters 683 17.7 Interpolating A/D Converters 686 17.8 Folding A/D Converters 689 17.9 Time-Interleaved A/D Converters 693 17.10 Key Points 696 17.11 References 697 17.12 Problems 698 CHAPTER 18 OVERSAMPLING CONVERTERS 702 18.1 Oversampling without Noise Shaping 702 18.2 Oversampling with Noise Shaping 708 18.3 System Architectures 717 18.4 Digital Decimation Filters 720 18.5 Higher-Order Modulators 724 18.6 Bandpass Oversampling Converters 727 18.7 Practical Considerations 728 18.8 Multi-Bit Oversampling Converters 733 18.9 Third-Order A/D Design Example 736 18.10 Key Points 739 18.11 References 740 18.12 Problems 741 CHAPTER 19 PHASE-LOCKED LOOPS 744 19.1 Basic Phase-Locked Loop Architecture 744 19.2 Linearized Small-Signal Analysis 754 19.3 Jitter and Phase Noise 762 19.4 Electronic Oscillators 771 19.5 Jitter and Phase Noise in PLLS 783 19.6 Key Points 787 19.7 References 788 19.8 Problems 788