
VLSI-Design of Non-Volatile Memories
Springer (Publisher)
Published on 13. October 2010
Book
Paperback/Softback
XXVIII, 582 pages
978-3-642-05774-8 (ISBN)
Description
The electronics and information technology revolution continues, but it is a critical time in the development of technology. Once again, we stand on the brink of a new era where emerging research will yield exciting applications and products destined to transform and enrich our daily lives! The potential is staggering and the ultimate impact is unimaginable, considering the continuing marriage of te- nology with fields such as medicine, communications and entertainment, to name only a few. But who will actually be responsible for transforming these potential new pr- ucts into reality? The answer, of course, is today's (and tomorrow's) design en- neers! The design of integrated circuits today remains an essential discipline in s- port of technological progress, and the authors of this book have taken a giant step forward in the development of a practice-oriented treatise for design engineers who are interested in the practical, industry-driven world of integrated circuit - sign.
More details
Edition
Softcover reprint of hardcover 1st ed. 2005
Language
English
Place of publication
Berlin
Germany
Publishing group
Springer Berlin
Target group
Professional and scholarly
Research
Illustrations
XXVIII, 582 p.
Dimensions
Height: 235 mm
Width: 155 mm
Thickness: 33 mm
Weight
914 gr
ISBN-13
978-3-642-05774-8 (9783642057748)
DOI
10.1007/b137712
Schweitzer Classification
Other editions
Additional editions

Giovanni Campardo | Rino Micheloni | David Novosel
VLSI-Design of Non-Volatile Memories
E-Book
12/2005
1st Edition
Springer
€234.33
Available for download

Giovanni Campardo | Rino Micheloni | David Novosel
VLSI-Design of Non-Volatile Memories
Book
01/2005
Springer
€246.09
Shipment within 10-15 days
Content
Non-Volatile Memory Design.- Process Aspects.- The MOSFET Transistor and the Memory Cell.- Passive Components.- Fundamental Circuit Blocks.- Layout.- The Organization of the Memory Array.- The Input Buffer.- Decoders.- Boost.- Synchronization Circuits.- Reading Circuits.- Multilevel Read.- Program and Erase Algorithms.- Circuits Used in Program and Erase Operations.- High-Voltage Management System.- Program and Erase Controller.- Redundancy and Error Correction Codes.- The Output Buffer.- Test Modes.- ESD & Latch-Up.- From Specification Analysis to Floorplan Definition.- Photo Album.