Nano-Interconnect Materials and Models for Next Generation Integrated Circuit Design
1st Edition
Published on 22. December 2023
Book
Hardback
212 pages
978-1-032-36381-3 (ISBN)
Description
Aggressive scaling of device and interconnect dimensions has resulted in many low-dimensional issues in the nanometer regime. This book deals with various new-generation interconnect materials and interconnect modeling, and highlights the significance of novel nano-interconnect materials for 3D integrated circuit design. It provides information about advanced nanomaterials like carbon nanotube (CNT) and graphene nanoribbon (GNR) for the realization of interconnects, interconnect models, and crosstalk noise analysis.
Features:
* Focuses on materials and nanomaterials utilization in next-generation interconnects based on carbon nanotubes (CNT) and graphene nanoribbons (GNR).
* Helps readers realize interconnects, interconnect models, and crosstalk noise analysis. * Describes hybrid CNT- and GNR-based interconnects.
* Presents the details of power supply voltage drop analysis in CNT and GNR interconnects.
* Overviews pertinent RF performance and stability analysis.
This book is aimed at graduate students and researchers in electrical and materials engineering, and nano-/microelectronics.
Features:
* Focuses on materials and nanomaterials utilization in next-generation interconnects based on carbon nanotubes (CNT) and graphene nanoribbons (GNR).
* Helps readers realize interconnects, interconnect models, and crosstalk noise analysis. * Describes hybrid CNT- and GNR-based interconnects.
* Presents the details of power supply voltage drop analysis in CNT and GNR interconnects.
* Overviews pertinent RF performance and stability analysis.
This book is aimed at graduate students and researchers in electrical and materials engineering, and nano-/microelectronics.
More details
Language
English
Place of publication
London
United Kingdom
Publishing group
Taylor & Francis Ltd
Target group
College/higher education
Professional and scholarly
Academic and Postgraduate
Illustrations
130 s/w Abbildungen, 7 s/w Photographien bzw. Rasterbilder, 123 s/w Zeichnungen, 11 s/w Tabellen
11 Tables, black and white; 123 Line drawings, black and white; 7 Halftones, black and white; 130 Illustrations, black and white
Dimensions
Height: 240 mm
Width: 161 mm
Thickness: 17 mm
Weight
505 gr
ISBN-13
978-1-032-36381-3 (9781032363813)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Other editions
Additional editions
Sandip Bhattacharya | J. Ajayan | Fernando Avila Herrera
Nano-Interconnect Materials and Models for Next Generation Integrated Circuit Design
Book
06/2025
1st Edition
CRC Press
€76.30
Shipment within 10-20 days
Sandip Bhattacharya | J. Ajayan | Fernando Avila Herrera
Nano-Interconnect Materials and Models for Next Generation Integrated Circuit Design
E-Book
12/2023
1st Edition
Taylor & Francis
€69.99
Available for download
Sandip Bhattacharya | J. Ajayan | Fernando Avila Herrera
Nano-Interconnect Materials and Models for Next Generation Integrated Circuit Design
E-Book
12/2023
1st Edition
Taylor & Francis
€69.99
Available for download
Persons
Sandip Bhattacharya received his Ph.D. (Eng.) degree from the Indian Institute of Engineering Science and Technology (IIEST), India, in 2017. From October 2017 to December 2020, he worked as a postdoctoral researcher at the HiSIM research center, Hiroshima University, Japan. He is currently working as an Associate Professor and Head of the Department of Electronics and Communication Engineering at SR University, Warangal, Telangana, India. His current research interests are nano device and interconnect modeling.
J. Ajayan received his B.Tech. degree in Electronics and Communication Engineering from Kerala University in 2009, and M.Tech. and Ph.D. degrees in Electronics and Communication Engineering from Karunya University, Coimbatore, India, in 2012 and 2017, respectively. He is an Associate Professor in the Department of Electronics and Communication Engineering at SR University, Telangana, India. He has published more than 100 research articles in various journals and international conferences. He has published two books, more than ten book chapters, and has two patents. He is a reviewer of more than 30 journals for various publishers. He was the Guest Editor for several of the special issues. His areas of interest are microelectronics, semiconductor devices, nanotechnology, RF integrated circuits, and photovoltaics.
Fernando Avila Herrera has worked in the field of academic and semiconductor industry. He has involved with the modeling and characterization of semiconductor devices, especially MOSFETs. Further, he has experience in device reliability modeling, model parameter extraction, Verilog-A, TCAD, and EDA tools. He also has experience in HiSIM family models for parameter extraction and physics modeling and FPGA programming. He has collaborated with different groups for developing compact models.
J. Ajayan received his B.Tech. degree in Electronics and Communication Engineering from Kerala University in 2009, and M.Tech. and Ph.D. degrees in Electronics and Communication Engineering from Karunya University, Coimbatore, India, in 2012 and 2017, respectively. He is an Associate Professor in the Department of Electronics and Communication Engineering at SR University, Telangana, India. He has published more than 100 research articles in various journals and international conferences. He has published two books, more than ten book chapters, and has two patents. He is a reviewer of more than 30 journals for various publishers. He was the Guest Editor for several of the special issues. His areas of interest are microelectronics, semiconductor devices, nanotechnology, RF integrated circuits, and photovoltaics.
Fernando Avila Herrera has worked in the field of academic and semiconductor industry. He has involved with the modeling and characterization of semiconductor devices, especially MOSFETs. Further, he has experience in device reliability modeling, model parameter extraction, Verilog-A, TCAD, and EDA tools. He also has experience in HiSIM family models for parameter extraction and physics modeling and FPGA programming. He has collaborated with different groups for developing compact models.
Content
1 Nanomaterials for Next-Generation Interconnects
2 Interconnect Modeling Using Graphene Nanoribbon (GNR)
3 Introduction to Nanoscale Interconnect Materials
4 Analysis of Simultaneous Switching Noise and IR Drop
5 Temperature-Dependent RF Performance Analysis of GNR-Based Nano-Interconnect Systems
6 Electro-Thermal Modeling of CNT and GNR Interconnect for Nano-Electronic Circuits
7 Hybrid Cu-Carbon as Interconnect Materials and Their Interconnect Models
8 Hybrid Cu-CNT Composite as Interconnect Materials and Their Equivalent Models
9 Relative Stability Analysis of the GNR and Cu Interconnect
10 Transmission Line-Based Modeling of CNT and GNR Interconnects Using Numerical Methods
2 Interconnect Modeling Using Graphene Nanoribbon (GNR)
3 Introduction to Nanoscale Interconnect Materials
4 Analysis of Simultaneous Switching Noise and IR Drop
5 Temperature-Dependent RF Performance Analysis of GNR-Based Nano-Interconnect Systems
6 Electro-Thermal Modeling of CNT and GNR Interconnect for Nano-Electronic Circuits
7 Hybrid Cu-Carbon as Interconnect Materials and Their Interconnect Models
8 Hybrid Cu-CNT Composite as Interconnect Materials and Their Equivalent Models
9 Relative Stability Analysis of the GNR and Cu Interconnect
10 Transmission Line-Based Modeling of CNT and GNR Interconnects Using Numerical Methods