
Verilog HDL Synthesis, A Practical Primer
J. Bhasker(Author)
Star Galaxy Publishing
Published on 21. May 2018
Book
Paperback/Softback
238 pages
978-0-9846292-2-0 (ISBN)
Description
With this book, you can: - Start writing synthesizable Verilog models quickly. - See what constructs are supported for synthesis and how these map to hardware so that you can get the desired logic. - Learn techniques to help avoid having functional mismatches. - Immediately start using many of the models for commonly used hardware elements described for your own use or modify these for your own application.
More details
Language
English
Product notice
Paperback (trade)
Unsewn / adhesive bound
Dimensions
Height: 233 mm
Width: 189 mm
Thickness: 17 mm
Weight
428 gr
ISBN-13
978-0-9846292-2-0 (9780984629220)
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Schweitzer Classification