
A Verilog HDL Primer, Third Edition
J. Bhasker(Author)
Star Galaxy Publishing
Published on 27. May 2018
Book
Paperback/Softback
400 pages
978-0-9846292-4-4 (ISBN)
Description
With this book, you can: 1. Learn Verilog HDL the fast and easy way. 2. Obtain a thorough understanding of the basic building blocks of Verilog HDL. 3. Find out how to model hardware. 4. Find out how to test the hardware model using a test bench.
More details
Language
English
Product notice
Paperback (trade)
Unsewn / adhesive bound
Dimensions
Height: 235 mm
Width: 191 mm
Thickness: 21 mm
Weight
685 gr
ISBN-13
978-0-9846292-4-4 (9780984629244)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Person
Bhasker is an Architect at eSilicon Corporation. He was a Distinguished Member of Technical Staff at Bell Laboratories, Lucent Technologies. He has taught VHDL and Verilog HDL at Lucent Technologies for more than four years. He has written four other books on hardware description languages and synthesis including the best-selling books "A VHDL Primer" and "Verilog HDL Synthesis, A Practical Primer". Bhasker has a Ph.D. in Computer Science from the University of Minnesota, M.Tech. in Computer Technology and a B.Tech. in Electrical Engineering from the Indian Institute of Technology, New Delhi.