Low-Power Digital VLSI Design
Circuits and Systems
Published on 27. September 2012
Book
Paperback/Softback
XVII, 530 pages
978-1-4613-5999-9 (ISBN)
Description
Low-Power Digital VLSI Design: Circuits and Systems
addresses both process technologies and device modeling. Power dissipation in CMOS circuits, several practical circuit examples, and low-power techniques are discussed. Low-voltage issues for digital CMOS and BiCMOS circuits are emphasized. The book also provides an extensive study of advanced CMOS subsystem design. A low-power design methodology is presented with various power minimization techniques at the circuit, logic, architecture and algorithm levels.
Features:
Features:
- Low-voltage CMOS device modeling, technology files, design rules
- Switching activity concept, low-power guidelines to engineering practice
- Pass-transistor logic families
- Power dissipation of I/O circuits
- Multi- and low- V T CMOS logic, static power reduction circuit techniques
- State of the art design of low-voltage BiCMOS and CMOS circuits
- Low-power techniques in CMOS SRAMS and DRAMS
- Low-power on-chip voltage down converter design
- Numerous advanced CMOS subsystems (e.g. adders, multipliers, data path, memories, regular structures, phase-locked loops) with several design options trading power, delay and area
- Low-power design methodology, power estimation techniques
- Power reduction techniques at the logic, architecture and algorithm levels
- More than 190 circuits explained at the transistor level.
More details
Edition
Softcover reprint of the original 1st ed. 1995
Language
English
Place of publication
New York
United States
Target group
Professional and scholarly
Research
Illustrations
XVII, 530 p.
Dimensions
Height: 235 mm
Width: 155 mm
Thickness: 30 mm
Weight
826 gr
ISBN-13
978-1-4613-5999-9 (9781461359999)
DOI
10.1007/978-1-4615-2355-0
Schweitzer Classification
Other editions
Additional editions
E-Book
12/2012
Springer
€213.99
Available for download
Book
06/1995
Kluwer Academic Publishers
€213.99
Shipment within 15-20 days
Content
1 Low-Power VLSI Design: An Overview.- 1.1 Why Low-Power?.- 1.2 Low-Power Applications.- 1.3 Low-Power Design Methodology.- 1.4 This Book.- References.- 2 Low-Voltage Process Technology.- 2.1 CMOS Process Technology.- 2.2 Bipolar Process Technology.- 2.3 Isolation in CMOS and Bipolar Technologies.- 2.4 CMOS and Bipolar Processes Convergence.- 2.5 BiCMOS Technology.- 2.6 Complementary BiCMOS Technology.- 2.7 BiCMOS Design Rules.- 2.8 Silicon On Insulator.- 2.9 Chapter Summary.- References.- 3 Low-Voltage Device Modeling.- 3.1 MOSFET Structure and Operation.- 3.2 SPICE Models of the MOS Transistor.- 3.3 CMOS Low-Voltage Analytical Model.- 3.4 CMOS Power Supply Voltage Scaling.- 3.5 Modeling of the Bipolar Transistor.- References.- 4 Low-Voltage Low-Power VLSI CMOS Circuit Design.- 4.1 CMOS Inverter: DC Characteristics.- 4.2 CMOS Inverter: Switching Characteristics.- 4.3 Power Dissipation.- 4.4 Capacitance Estimation.- 4.5 CMOS static Logic Design.- 4.6 CMOS Logic Styles.- 4.7 Clocking.-4.8 Pass-Transistor Logic Families.- 4.9 I/O Circuits.- 4.10 Low-Power Circuit Techniques.- 4.11 Adiabatic Computing.- 4.12 Chapter Summary.- References.- 5 Low-Voltage VLSI BiCMOS Circuit Design.- 5.1 Conventional BiCMOS Logic.- 5.2 BYNMOS Logic Family.- 5.3 Low-Voltage BiCMOS families.- 5.4 Low-Voltage BiCMOS Applications.- 5.5 Chapter Summary.- References.- 6 Low-Power CMOS Random Access Memory Circuits.- 6.1 Static RAM (SRAM).- 6.2 Dynamic RAM.- 6.3 On-Chip Voltage Down Converter.- 6.4 Chapter Summary.- References.- 7 VLSI CMOS Subsystem Design.- 7.1 Parallel Adders.- 7.2 Parallel Multipliers.- 7.3 Data Path.- 7.4 Regular Structures.- 7.5 Phase Locked Loops.- 7.6 Chapter Summary.- References.- 8 Low-Power VLSI Design Methodology.- 8.1 LP Physical Design.- 8.2 LP Gate-Level Design.- 8.3 LP Architecture-Level Design.- 8.4 Algorithmic-Level Power Reduction.- 8.5 Power Estimation Techniques.- 8.6 Chapter Summary.- References.- Reference.