CMOS
Circuit Design, Layout, and Simulation
Published on 22. August 1997
Book
Hardback
944 pages
978-0-7803-3416-8 (ISBN)
Description
"This exceptionally comprehensive tutorial presentation of complementary metal oxide semiconductor (CMOS) integrated circuits will guide you through the process of implementing a chip from the physical definition through the design and simulation of the finished chip. CMOS: CIRCUIT DESIGN, LAYOUT, AND SIMULATION provides an important contemporary view of a wide range of circuit blocks, the BSIM model, data converter architectures, and much more. Outstanding features of this text include: * Phase- and delay-locked loops, mixed-signal circuits, and data converters* More than 1,000 figures, 200 examples, and over 500 end-of-chapter problems* In-depth coverage of both analog and digital circuit-level design techniques* Real-world process parameters and design rules* Information on MOSIS fabrication procedures, and other key topics of interest* Information and directions on submitting chips of MOSIS* Tutorial presentation of material suitable for self study or as a university textbook* Numerous examples and homework problems For more information and links related to CMOS design, go to http://cmosedu.com. Professors: To request an examination copy simply e-mail collegeadoption@ieee.org."
Sponsored by: IEEE Solid-State Circuits Council/Society, IEEE Circuits and Systems Society.
Sponsored by: IEEE Solid-State Circuits Council/Society, IEEE Circuits and Systems Society.
More details
Series
Language
English
Place of publication
New York
United States
Publishing group
John Wiley and Sons Ltd
Target group
College/higher education
Professional and scholarly
Illustrations
Illustrations
Dimensions
Height: 23.7 cm
Width: 16.3 cm
Weight
1389 gr
ISBN-13
978-0-7803-3416-8 (9780780334168)
Schweitzer Classification
Other editions
New editions
Book
11/2004
2nd Edition
Wiley
€77.90
Article exhausted; check for reprint
Persons
About the Authors R. Jacob Baker is an Associate Professor of Electrical Engineering and Assistant Director of the Microelectronics Research Center at the University of Idaho. He teaches several courses on CMOS analog and digital circuit design and has consulted internationally in these areas. With eight years of industry experience at E. G. & G. Energy Measurements, Lawrence Livermore National Laboratory, and Micron Semiconductor, Dr. Baker brings an industrial perspective into the classroom and was selected as the College of Engineering's Outstanding Young Faculty in 1997. Harry W. Li is an Associate Professor in the Department of Electrical Engineering at the University of Idaho. Dr. Li is actively involved with the University's Microelectronics Research Center. He has received numerous teaching awards and is the department's outreach coordinator, presenting "hands-on" demonstrations of electrical engineering to area schools. David E. Boyce is an independent consultant on semiconductor technologies. He has more than 20 years experience working for General Electric, RCA, and Harris. He has been involved in numerous projects, mainly in the fields of medical ultrasonic imaging, power and high-voltage integrated circuits, and optoelectronics.
Content
Preface. CMOS FUNDAMENTALS. Introduction. The Well. The Metal Layers. The Active and Poly Layers. The MOSFET. The BSIM SPICE Model. CMOS Passive Elements. Design Verification with LASICKT. Analog MOSFET Models. The Digital Model. CMOS DIGITAL CIRCUITS. The Inverter. Static Logic Gates. The TG and Flip-Flops. Dynamic Logic Gates. VLSI Layout. BiSMOS Logic Gates. Memory Circuits. Special-Purpose Digital Circuits. Digital Phase-Locked Loops. CMOS ANALOG CIRCUITS. Current Sources and Sinks. References. Amplifiers. Feedback Amplifiers. Differential Amplifiers. Operational Amplifiers. MIXED-SIGNAL CIRCUITS. Nonlinear Analog Circuits. Dynamic Analog Circuits. Data Converter Fundamentals. Data Converter Architectures. Appendix A: Orbit's CN20 Process. Appendix B: MOSIS Scalable Design Rules. Appendix C: HP's CMOS14TB. Index. About the Authors. LASI Software.