Digital Systems Testing and Testable Design
Published on 13. September 1994
Book
Hardback
672 pages
978-0-7803-1062-9 (ISBN)
Description
This updated printing of the leading text and reference in digital systems testing and testable design provides comprehensive, state-of-the-art coverage of the field. Included are extensive discussions of test generation, fault modeling for classic and new technologies, simulation, fault simulation, design for testability, built-in self-test, and diagnosis. Complete with numerous problems, this book is a must-have for test engineers, ASIC and system designers, and CAD developers, and advanced engineering students will find this book an invaluable tool to keep current with recent changes in the field.
More details
Edition
Revised edition
Language
English
Place of publication
United States
Publishing group
John Wiley & Sons Inc
Target group
College/higher education
Professional and scholarly
Product notice
sewn/stitched
Cloth over boards
Dimensions
Height: 260 mm
Width: 183 mm
Thickness: 40 mm
Weight
1440 gr
ISBN-13
978-0-7803-1062-9 (9780780310629)
Copyright in bibliographic data and cover images is held by Nielsen Book Services Limited or by the publishers or by their respective licensors: all rights reserved.
Schweitzer Classification
Persons
Miron Abramovici is a Distinguished Member of the Technical Staff at AT&T Bell Laboratories in Murray Hill, and an Adjunct Professor of Computer Engineering at the Illinois Institute of Technology in Chicago.
Melvin A. Breuer is a Professor of Electrical Engineering and Computer Science at the University of Southern California in Los Angeles.
Arthur D. Friedman is a Professor in the Department of Electrical Engineering and Computer Science at George Washington University.
All three authors are Fellows of the IEEE and have contributed extensively to the fields discussed in this book.
Melvin A. Breuer is a Professor of Electrical Engineering and Computer Science at the University of Southern California in Los Angeles.
Arthur D. Friedman is a Professor in the Department of Electrical Engineering and Computer Science at George Washington University.
All three authors are Fellows of the IEEE and have contributed extensively to the fields discussed in this book.
Content
Preface.
How This Book Was Written.
Introduction.
Modeling.
Logic Simulation.
Fault Modeling.
Fault Simulation.
Testing For Single Stuck Faults.
Testing For Bridging Faults.
Functional Testing.
Design For Testability.
Compression Techniques.
Built-In Self-Test.
Logic-Level Diagnosis.
Self-Checking Design.
PLA Testing.
System-Level Diagnosis.
Index.
How This Book Was Written.
Introduction.
Modeling.
Logic Simulation.
Fault Modeling.
Fault Simulation.
Testing For Single Stuck Faults.
Testing For Bridging Faults.
Functional Testing.
Design For Testability.
Compression Techniques.
Built-In Self-Test.
Logic-Level Diagnosis.
Self-Checking Design.
PLA Testing.
System-Level Diagnosis.
Index.