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Srawnitel'noe issledowanie
Published on 13. August 2024
Book
Paperback/Softback
76 pages
978-620-7-94324-1 (ISBN)
Description
Differencial'naq kaskodnaq logika s pereklücheniem naprqzheniq (DCVSL) - äto tehnologiq KMOP-shem, kotoraq imeet potencial'nye preimuschestwa pered obychnoj logikoj NAND/NOR s tochki zreniq rasseiwaemoj moschnosti, zaderzhki shemy, plotnosti komponowki i gibkosti logiki. V dannoj rabote priwoditsq podrobnoe srawnenie wseh struktur DCVSL, wklüchaq realizaciü shemy polnogo summatora s ispol'zowaniem ätih struktur DCVSL, w tom chisle staticheskoj DCVSL, dinamicheskoj DCVSL i modificirowannoj DCVSL. Analiz proizwoditel'nosti wypolnen w Cadence Virtuoso po 90-nm KMOP-tehnologii. Posle analiza wseh ätih DCVSL-struktur sleduet realizaciq polnogo summatora. Addery qwlqütsq stroitel'nymi blokami w komp'üternyh sistemah. V cifrowyh komp'üternyh sistemah shiroko ispol'zuütsq arifmeticheskie operacii. Slozhenie - äto neobhodimaq arifmeticheskaq operaciq, kotoraq takzhe qwlqetsq kornem dlq takoj arifmeticheskoj operacii, kak umnozhenie. Analogichno, dobawiw esche odin XOR-gejt, bazowaq qchejka summatora mozhet byt' modificirowana dlq raboty w kachestwe subtraktora, kotoryj mozhet byt' ispol'zowan dlq deleniq. Takim obrazom, 1-bitnaq qchejka polnogo summatora qwlqetsq konechnym i prostym blokom arifmeticheskogo ustrojstwa sistemy. Poätomu bazowaq 1-bitnaq qchejka polnogo summatora dolzhna byt' uluchshena, kak i proizwoditel'nost' cifrowyh shem.
More details
Language
Other
Product notice
Paperback (trade)
Unsewn / adhesive bound
Dimensions
Height: 220 mm
Width: 150 mm
Thickness: 6 mm
Weight
131 gr
ISBN-13
978-620-7-94324-1 (9786207943241)
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Schweitzer Classification
Person
Ya Subhradzhit Roj. Ya poluchil stepen' magistra tehnicheskih nauk po special'nosti VLSI Design & Embedded Systems w 2015 godu w Nacional'nom tehnologicheskom institute, Rurkela, Indiq. V nastoqschee wremq q rabotaü w IT-kompanii.