High Efficiency Video Coding (HEVC)

Algorithms and Architectures
 
 
Springer (Verlag)
  • erschienen am 23. August 2014
  • |
  • X, 375 Seiten
 
E-Book | PDF mit Wasserzeichen-DRM | Systemvoraussetzungen
978-3-319-06895-4 (ISBN)
 

This book provides developers, engineers, researchers and students with detailed knowledge about the High Efficiency Video Coding (HEVC) standard. HEVC is the successor to the widely successful H.264/AVC video compression standard, and it provides around twice as much compression as H.264/AVC for the same level of quality. The applications for HEVC will not only cover the space of the well-known current uses and capabilities of digital video - they will also include the deployment of new services and the delivery of enhanced video quality, such as ultra-high-definition television (UHDTV) and video with higher dynamic range, wider range of representable color, and greater representation precision than what is typically found today. HEVC is the next major generation of video coding design - a flexible, reliable and robust solution that will support the next decade of video applications and ease the burden of video on world-wide network traffic. This book provides a detailed explanation of the various parts of the standard, insight into how it was developed, and in-depth discussion of algorithms and architectures for its implementation.

2014
  • Englisch
  • Cham
  • |
  • Schweiz
Springer International Publishing
  • 127
  • |
  • 95 s/w Tabellen, 53 farbige Abbildungen, 127 s/w Abbildungen
  • |
  • 127 schwarz-weiße und 53 farbige Abbildungen, 95 schwarz-weiße Tabellen, Bibliographie
  • 11,49 MB
978-3-319-06895-4 (9783319068954)
10.1007/978-3-319-06895-4
weitere Ausgaben werden ermittelt

About the Editors

Vivienne Sze is an Assistant Professor at the Massachusetts Institute of Technology (MIT) in the Electrical Engineering and Computer Science Department. Her research interests include energy-aware signal processing algorithms and low-power circuit and system design for portable multimedia applications. Prior to joining MIT, she was with the R&D Center at Texas Instruments (TI), where she represented TI in the JCT-VC committee of ITU-T and ISO/IEC standards body during the development of HEVC (ITU-T H.265 | ISO/IEC 23008-2). Within the committee, she was the Primary Coordinator of the core experiments on coefficient scanning and coding and Chairman of ad hoc groups on topics related to entropy coding and parallel processing. Dr. Sze received the Ph.D. degree in Electrical Engineering from MIT. She has contributed over 70 technical documents to HEVC and has published over 25 journal and conference papers. She was a recipient of the 2007 DAC/ISSCC Student Design Contest Award and a co-recipient of the 2008 A-SSCC Outstanding Design Award. In 2011, she received the Jin-Au Kong Outstanding Doctoral Thesis Prize in Electrical Engineering at MIT for her thesis on "Parallel Algorithms and Architectures for Low Power Video Decoding".

Madhukar Budagavi is a Senior Member of the Technical Staff at Texas Instruments (TI) and leads Compression R&D activities in the Embedded Processing R&D Center in Dallas, TX, USA. His responsibilities at TI include research and development of compression algorithms, embedded software implementation and prototyping, and video codec SoC architecture for TI products in addition to video coding standards participation. Dr. Budagavi represents TI in ITU-T and ISO/IEC international video coding standardization activity. He has been an active participant in the standardization of HEVC (ITU-T H.265 | ISO/IEC 23008-2) next-generation video coding standard by the JCT-VC committee of ITU-T and ISO/IEC. Within the JCT-VC committee he has helped co-ordinate sub-group activities on spatial transforms, quantization, entropy coding, in-loop filtering, intra prediction, screen content coding and scalable HEVC (SHVC). Dr. Budagavi received the Ph.D. degree in Electrical Engineering from Texas A & M University. He has published six book chapters and over 35 journal and conference papers. He is a Senior Member of the IEEE.

Gary J. Sullivan is a Video and Image Technology Architect at Microsoft Corporation in its Corporate Standardization Group. He has been a longstanding chairman or co-chairman of various video and image coding standardization activities in ITU-T VCEG, ISO/IEC MPEG, ISO/IEC JPEG, and in their joint collaborative teams since 1996. He is best known for leading the development of the AVC (ITU-T H.264 | ISO/IEC 14496-10) and HEVC (ITU-T H.265 | ISO/IEC 23008-2) standards, and the extensions of those standards for format application range enhancement, scalable video coding, and 3D / stereoscopic / multiview video coding. At Microsoft, he has been the originator and lead designer of the DirectX Video Acceleration (DXVA) video decoding feature of the Microsoft Windows operating system. Dr. Sullivan received the Ph.D. degree in Electrical Engineering from the University of California, Los Angeles. He has published approximately 10 book chapters and prefaces and 50 conference and journal papers. He has received the IEEE Masaru Ibuka Consumer Electronics Technical Field Award, the IEEE Consumer Electronics Engineering Excellence Award, the Best Paper award of the IEEE Trans. CSVT, the INCITS Technical Excellence Award, the IMTC Leadership Award and the University of Louisville J. B. Speed Professional Award in Engineering. The team efforts that he has led have been recognized by an ATAS Primetime Emmy Engineering Award and a pair of NATAS Technology & Engineering Emmy Awards. He is a Fellow of the IEEE and SPIE.

Introduction.- High-Level Syntax in HEVC.- Block Structures and Parallelism Features in HEVC.- Intra-Picture Prediction in HEVC.- Inter-Picture Prediction in HEVC.- Transform and Quantization in HEVC.- In-Loop Filters in HEVC.- Entropy Coding in HEVC.- Compression Performance Analysis of HEVC.- Decoder Hardware Architecture for HEVC.- Encoder Hardware Architecture for HEVC.

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