Efficient Design of Variation-Resilient Ultra-Low Energy Digital Processors

 
 
Springer (Verlag)
  • erschienen am 22. April 2020
 
  • Buch
  • |
  • Softcover
  • |
  • XXIV, 209 Seiten
978-3-030-12487-8 (ISBN)
 

This book enables readers to achieve ultra-low energy digital system performance. The author's main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy.

1st ed. 2019
  • Englisch
  • Cham
  • |
  • Schweiz
Springer International Publishing
  • 61
  • |
  • 80 farbige Abbildungen, 50 farbige Tabellen, 61 s/w Abbildungen
  • Höhe: 23.5 cm
  • |
  • Breite: 15.5 cm
978-3-030-12487-8 (9783030124878)
10.1007/978-3-030-12485-4
weitere Ausgaben werden ermittelt

Hans Reyserhove was born in Turnhout, Belgium in 1989. He received the B.S. and M.S. degrees cum laude in engineering science, electrical engineering from KU Leuven, Leuven, Belgium, in 2010 and 2012. The topic of his master thesis was "A pixel level ADC for extreme parallelism, high frame rate and high dynamic range image sensors". In 2011, he interned at the NCTU Si2Lab, Hsinchu, Taiwan. He is currently working as a research assistant at the ESAT- MICAS laboratories of the KU Leuven towards a Ph.D. degree in the field of near-threshold digital circuit design with a focus on automating design flows, standard cell design, microprocessors and better-than-worst-case design techniques. The promoter of his Ph.D. is Prof. Dr. Ir. Wim Dehaene. His main research interests are local and energy-efficient compute, low voltage operation, microprocessors and better-than-worst-case design techniques.

Wim Dehaene was born in Nijmegen, The Netherlands, in 1967. He received the M. Sc. degree in electrical and mechanical en- gineering in 1991 from the Katholieke Universiteit Leuven. In November 1996 he received the Ph. D degree at the Katholieke Universiteit Leuven. His thesis is entitled CMOS integrated circuits for analog signal processing in hard disk systems. After receiving the M. Sc. Degree Wim Dehaene was a research assistant at the ESAT-MICAS Laboratory of the Katholieke Universiteit Leuven. His research involved the design of novel CMOS building blocks for hard disk systems. The research was first sponsored by the IWONL (Belgian Institute for Science and Research in Industry and agriculture) and later by the IWT (the Flemish institute for Scientific Research in the Industry). In November 1996 Wim Dehaene joined Alcatel Microelectronics, Belgium. There he was a senior project leader for the feasibility, design and development of mixed mode Systems on Chip. The application domains were telephony, xDSL and high speed wireless LAN. In July 2002 Wim Dehaene joined the staff of the ESAT- MICAS laboratory of the Katholieke Universiteit Leuven where he is now a full professor and head of the MICAS division. His research domain is circuit level design of digital circuits. The current focus is on ultra low power signal processing and memories in advanced CMOS technologies. Part of this research is performed in cooperation with IMEC, Belgium, where he is also a part time principal scientist. Wim Dehaene is teaching several classes on electrical engineering and digital circuit and system design. He is also very interested in the didactics of engineering. As such he is guiding several projects aiming to bring engineering to youngsters in secondary education and he is a teacher in the teacher education program of the KULeuven. Wim Dehaene is a senior member of the IEEE. Wim Dehaene was the technical program-chair for ESSCIRC 2017. He also is a member of the ISSCC program committee.

Chapter 1. Energy-Efficient Processors: Challenges and Solutions.- Chapter 2. Near-Threshold Operation: Technology, Building Blocks and Architecture.- Chapter 3. Efficient VLSI Design Flow.- Chapter 4. Ultra-Low Voltage Microcontrollers.- Chapter 5. Error Detection and Correction.- Chapter 6. Timing Error-Aware Microcontroller.- Chapter 7. Conclusion.


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