This book brings together a selection of the best papers from the twenty-first edition of the Forum on specification and Design Languages Conference (FDL), which took place on September 10-12, 2018, in Munich, Germany. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.
Covers Assertion Based Design, Verification & Debug;
Includes language-based modeling and design techniques for embedded systems;
Covers design, modeling and verification of mixed physical domain and mixed signal systems that include significant analog parts in electrical and non-electrical domains;
Includes formal and semi-formal system level design methods for complex embedded systems based on the Unified Modelling Language (UML) and Model Driven Engineering (MDE).
Tom J Kazmierski is an Associate Professor the Electronic Systems and Software Research Group at the Faculty of Physical Sciences and Engineering, University of Southampton, UK. He received the M.S. degree in Electronic Engineering from the Warsaw University of Technology, Warsaw, Poland, in 1973 and the Ph.D. degree from the Military University of Technology, Warsaw, in 1976. He pursues research into numerical modelling, simulation, and synthesis techniques for computer-aided design of very large scale integration (VLSI) circuits and mixed-technology systems. From 1989 to 1990 he was a Lecturer in Microelectronics at the Griffith University in Brisbane, Australia. From 1990 to 1991 Tom worked as a Visiting Research Scientist at the IBM VLSI Technology Division, San Jose, CA, USA where he developed and patented synchronisation techniques for multi-solver simulation backplanes. He has contributed to the development of the VHDL-AMS standard by the IEEE, served as Chair of the IEEE DASC P1076.1 (VHDL-AMS) Working Group from 1999 to 2005. He has published over 160 papers, edited three books, and given a number of conference keynotes, invited talks and tutorials mostly in the area of analogue and mixed signal synthesis and hardware description languages. In recent years he has been working on simulation techniques, applications of VHDL-AMS and other hardware description languages to high-level system modelling and synthesis, including automated analogue and mixed-signal synthesis for ASIC design, synthesis of artificial VLSI neural networks, performance modelling of mixed-technology electromechanical systems and energy-harvester powered sensor nodes.
The research of Sebastian Steinhorst (b. 1980) centers around design methodology and the hardware/software co-design of distributed embedded systems for use in Internet of Things, smart energy and automotive applications. Key aspects are the architecture, modelling, verification, efficiency, dependability and security of such systems, taking all abstraction levels into consideration.
Prof. Steinhorst studied computer science at Goethe University Frankfurt, Germany. He received his PhD from the same university in 2011. From 2011 to 2016 he worked at the TUM CREATE research center in Singapore where he was leading the Embedded Systems Group as principal investigator (since 2015) and previously held senior research fellow and research fellow positions. From May till September 2016 he was an assistant professor in the Department of Engineering at Aarhus University, Denmark. Sebastian Steinhorst has been a Rudolf Moessbauer tenure track assistant professor at TUM since November 2016
Daniel Grosse is a Senior Researcher @ AGRA - University of Bremen, in Germany.
Introduction.- Automatic Generation of Cycle-Accurate Simulink Blocks from HDL IPs.- Towards Early Validation of Firmware-Based Power Management Using Virtual Prototypes: A Constrained Random Approach.- Symbolic Simulation of Dataflow Synchronous Programs with Timers.- Language and Hardware Acceleration Backend for Graph Processing.- Runtime Task Mapping for Lifetime Budgeting in Many-Core Systems.- Fault Analysis in Analog Circuits through Language Manipulation and Abstraction.- Towards Consistency Checking Between HDL and UPF Descriptions.